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Binary Addition CSC 103 September 17, 2007.

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Presentation on theme: "Binary Addition CSC 103 September 17, 2007."— Presentation transcript:

1 Binary Addition CSC 103 September 17, 2007

2 Recap: Binary Numbers Physical representation Abstract representation
Transistor Concept of “on” and “off” for physical manufacturing of computers  T/F… Abstract representation Logic: NOT, AND, OR Truth tables ANY Boolean expression can be built with transistors – wired as AND, OR or NOT

3 Recap: Transistors = 0 = 1 = or = 1 = 1 or = 0 = 1

4 Logic Functions: NOT The ‘NOT’ function A A’ 0 1 1 0

5 Recap Logic Gate: AND Function
(=1) 1 (=1) 1

6 Logic Gate: OR Function
1 1 1 1

7 Onto Addition and the Adder Circuit...

8 Binary Addition Add Add these numbers 1000111 1011010 0100110 0111001
0 + 0 = 0 + 1 = 1 + 0 = 1 + 1 = Add these numbers c: s:

9 Binary Addition: Half Adder
We need a circuit to add two bits Either bit can be ‘0’ or ‘1’ The function in the truth table is Sum = A’B + AB’  Exclusive-OR function Carry = AB

10 The Half-Adder and Exclusive OR Gate
A’B + AB’ = Exclusive OR Typically abbreviated to XOR Simulator uses EOR A B’ A’ B A B A B | S C | | | |

11 Recap Logic Gates: Symbols
AB, AB A+B A, A’ XOR

12 Summary: The Half-Adder and Exclusive OR Gate
Typically abbreviated to XOR Simulator uses EOR A B

13 Binary Addition: Half Adder

14 Half-Adder  Full-Adder

15 The Full Adder A full adder is a circuit with three inputs (including a ‘carry-in’) and two outputs (the sum and carry-out) What is the third input? Exercise: Add (carry) ( ‘A’ ) ( ‘B’ ) (sum) For adding two numbers, we need three inputs

16 The Full Adder Cascade two half-adders to get a full adder A B Cin

17 HW: Cascade 2 Full Adders for a 2-Bit Adder
A2A  + B2B  B2 A B1 A1 Full Adder Full Adder Cout Cin2 = Cout Cin1 S S1

18 Summary Binary addition Concept of ‘sum’ and ‘carry’
Half adder and full adder circuits Cascading circuits to make larger ones


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