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Sahar Mosleh PageCalifornia State University San Marcos 1 Multiplexer, Decoder and Circuit Designing.

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Presentation on theme: "Sahar Mosleh PageCalifornia State University San Marcos 1 Multiplexer, Decoder and Circuit Designing."— Presentation transcript:

1 Sahar Mosleh PageCalifornia State University San Marcos 1 Multiplexer, Decoder and Circuit Designing

2 Sahar Mosleh PageCalifornia State University San Marcos 2 Decoders A Decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2 n unique output lines. As an example consider the 3-to-8 line decoder circuit below: D 0 = x’y’z’ D 1 = x’y’z D 2 = x’yz’ D 3 = x’yz D 4 = xy’z’ D 5 = xy’z D 6 = xyz’ D 7 = xyz y z x

3 Sahar Mosleh PageCalifornia State University San Marcos 3 The three inputs are decoded into eight outputs, each representing one of the minterms of the three input variables The three inverters provide the complement of inputs, Each one of eight AND gates represent one of the minterms.

4 Sahar Mosleh PageCalifornia State University San Marcos 4 Multiplexer A multiplexer is a combinational circuit that select binary information from one of many input lines and direct it to a single output line. The selection of particular input line is controlled by a set of selection lines. Normally, there are 2 n input line and n selection lines whose combinations determine which input is selected. A 2-to-1 line multiplexer connects one of two 1-bit source to a common destination as shown in the next slide. The block diagram of the circuit is also shown below. I0I0 I1I1 Y S MUX

5 Sahar Mosleh PageCalifornia State University San Marcos 5 The circuit has two data input lines, and one selection line S. When S=0, the upper AND gate is enabled and the I 0 has path to the output When S=1, the lower AND gate is enabled and I 1 has path to the output. The multiplexer act like electric switch that select one of two sources. I0I0 I1I1 S Y

6 Sahar Mosleh PageCalifornia State University San Marcos 6 A 4-to-1 line multiplexer is shown below Each of the four inputs I 0 through I 3, is applied to one input of an AND gate. Selection lines S 1 and S 0 are decoded to select a particular AND gate The output of AND gates are applied to a single OR gate that provides the 1-line output. s1s1 s0s0 I0I0 I1I1 I2I2 I3I3 Y

7 Sahar Mosleh PageCalifornia State University San Marcos 7 By looking at the truth table below we can see that: When S 0 =0 and S 1 =0 then Y=I 0 When S 0 =1 and S 1 =0 then Y=I 1 When S 0 =0 and S 1 =1 then Y=I 2 When S 0 =1 and S 1 =1 then Y=I 3 A multiplexer is also called a data selector, Since it selects one of many inputs and steers the binary information to output line. The AND gates and inverters in the multiplexer is a Decoder circuit, and indeed they decode the selection input lines.

8 Sahar Mosleh PageCalifornia State University San Marcos 8 Example Design a combinational circuit with three input and one output. The output is 1 when the binary value of the input is less than 3. The input is 0 otherwise. Answer: 1.From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each. In this question, we have three input (lets call them x,y,z) and one output (lets call it F) 1.Derive the truth table that defines the required relationship between inputs and outputs. (from question it says that the output is 1, if the binary value of input is less than 3 xyZF 0000111100001111 0011001100110011 0101010101010101 1110000011100000

9 Sahar Mosleh PageCalifornia State University San Marcos 9 3.Obtain the simplified Boolean function for each output as a function of a input variables F = x’y’+ x’z’ 4.Draw the logic diagram and verify the correctness of the design y 11 1 00 01 10 11 0 1x z yz x y’ x’ Z’ F x’

10 Sahar Mosleh PageCalifornia State University San Marcos 10 Example A majority circuit is a combinational circuit those output is equal to 1 if the input variables have more 1’s than 0’s. the output is 0 otherwise. Design a 3-input majority circuit. Answer: 1) From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each. In this question, we have three input (lets call them x,y,z) and one output (lets call it F) xyZF 0000111100001111 0011001100110011 0101010101010101 0001011100010111

11 Sahar Mosleh PageCalifornia State University San Marcos 11 3.Obtain the simplified Boolean function for each output as a function of a input variables F = xy+ xz+yz 4.Draw the logic diagram and verify the correctness of the design y 1 1 1 1 00 01 10 11 0 1x z yz x y x Z F x y Z

12 Sahar Mosleh PageCalifornia State University San Marcos 12 Example Design a combinational circuit that convert a 4 bit Gray code to a 4-bit binary number. Implement the circuit with exclusive-OR gates. A Gray Code is a kind of binary code that any two successive code differ by only one variable like Karnaugh map cells ) Answer: 1) From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each. In this question we have four input (lets call them A,B,C,D) and four output (lets call them W,X,Y,Z)

13 Sahar Mosleh PageCalifornia State University San Marcos 13 2)Derive the truth table that defines the required relationship between inputs and outputs. (convert a 4 bit Gray code (a kind of binary code that any two successive code differ by only one variable like Karnaugh map cells ) to a 4-bit binary number) ABCD 00000000111111110000000011111111 00001111111100000000111111110000 00111100001111000011110000111100 01100110011001100110011001100110 WXYZ 00000000111111110000000011111111 00001111000011110000111100001111 00110011001100110011001100110011 01010101010101010101010101010101

14 Sahar Mosleh PageCalifornia State University San Marcos 14 3) Obtain the simplified Boolean function for each output as a function of a input variables W=AX=AB’+A’B=A+B Y=A’B’C +A’BC’+ABC+AB’C’Z=A + B + C + D Y= A’(B + C) + A(B + C)’Z=Y + D Y=A + B + C = X + C Detail of how to get function Z is the same as for function Y, except write down the minterm directly from map without simplification. 00 1111 1111 CD AB 11 01 00 10 11 B C D A 00 1111 1111 CD AB 11 01 00 10 11 B C D A 00 11 11 11 11 CD AB 11 01 00 10 11 B C D A 00 11 11 11 11 CD AB 11 01 00 10 11 B C D A

15 Sahar Mosleh PageCalifornia State University San Marcos 15 4) Draw the logic diagram and verify the correctness of the design A B C D W X Y Z

16 Sahar Mosleh PageCalifornia State University San Marcos 16 Example Design a 4-bit combinational circuit incremented (the circuit that adds one to a 4-bit binary number). The circuit can be designed using four half adders. sc s c s c x yxy s c A3A3 x y x y 1 A0A0 A1A1 A2A2 HA


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