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Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 1 Introduction to Electronic Circuit Design.

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Presentation on theme: "Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 1 Introduction to Electronic Circuit Design."— Presentation transcript:

1 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 1 Introduction to Electronic Circuit Design Richard R. Spencer Mohammed S. Ghausi

2 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 2 Figure 14-1 Node voltage levels showing allowed and forbidden ranges of values.

3 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 3

4 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 4 Figure 14-2 (a) Inverter, or NOT gate. (b) Truth table. Figure 14-3 (a) OR gate. (b) Truth table. Figure 14-4 (a) AND gate. (b) Truth table.

5 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 5 Figure 14-6 (a) NOR gate constructed using an OR gate and an inverter, (b) the NOR schematic symbol, and (c) truth table.

6 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 6 Figure 14-7 (a) NAND gate. (b) Truth table.

7 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 7 Figure 14-11 (a) An SR flip-flop, (b) a table describing the circuit’s function, and (c) the schematic symbol.

8 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 8 Figure 14-13 A clocked SR flip-flop.

9 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 9 Figure 14-14 (a) A JK flip-flop made using an SR flip-flop. (b) The schematic symbol for a JK flip-flop and (c) the function table. (The flip-flop only changes state when the clock is high.)

10 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 10 Figure 14-15 A master-slave JK flip-flop.

11 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 11 Figure 14-16 (a) An edge-triggered JK flip-flop and (b) the schematic symbol for it.

12 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 12 Figure 14-19 (a) A D flip-flop, (b) its schematic symbol, and (c) the function table.

13 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 13 Figure 14-21 A 4-bit shift register made using D flip-flops.

14 Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 14 Figure 14-23 (a) A 3-bit synchronous binary counter and (b) its function table.

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