1. Logic Gates

2. Transistors as Switches ¡EB voltage controls whether the transistor conducts in a common base configuraiton. ¡Logic circuits can be built

3. AND ¡In order for current to flow, both switches must be closed ¤Logic notation A  B = C ABC 000 010 100 111

4. OR ¡Current flows if either switch is closed ¤Logic notation A + B = C ABC 000 011 101 111

5. Properties of AND and OR ¡Commutation ¤A + B = B + A ¤A  B = B  A Same as

6. Properties of AND and OR ¡Associative Property ¤A + (B + C) = (A + B) + C ¤A  (B  C) = (A  B)  C =

7. Properties of AND and OR ¡Distributive Property ¤A + B  C = (A + B)  (A + C) ¤A + B  C ABCQ 0000 0010 0100 1001 1011 1101 1111

8. Distributive Property ¡(A + B)  (A + C) ABCQ 0000 0010 0100 1001 1011 1101 1111

9. Binary Addition ABSC(arry) 0000 1010 0110 1101 Notice that the carry results are the same as AND C = A  B

10. Inversion (NOT) AQ 01 10 Logic:

11. Exclusive OR (XOR) Either A or B, but not both This is sometimes called the inequality detector, because the result will be 0 when the inputs are the same and 1 when they are different. The truth table is the same as for S on Binary Addition. S = A  B ABS 000 101 011 110

12. Getting the XOR ABS 000 101 011 110 Two ways of getting S = 1

13. Circuit for XOR Accumulating our results: Binary addition is the result of XOR plus AND

14. Half Adder Called a half adder because we haven’t allowed for any carry bit on input. In elementary addition of numbers, we always need to allow for a carry from one column to the next. 18 25 4 3 (plus a carry)

15. Full Adder INPUTSOUTPUTS ABC IN C OUT S 00000 00101 01001 01110 10001 10110 11010 11111

16. Full Adder Circuit

17. Chaining the Full Adder Possible to use the same scheme for subtraction by noting that A – B = A + (-B)

18. Binary Counting Use 1 for ON Use 0 for OFF = 00101011 Binary Counter So our example has 2 5 + 2 3 + 2 1 + 2 0 = 32 + 8 + 2 + 1 = 43

19. 111110112110101 2101211002210110 3111311012310111 41001411102411000 51011511112511001 611016100002611010 711117100012711011 8100018100102811100 9100119100112911101 10101020101003011110

20. NAND (NOT AND) ABQ 001 011 101 110

21. NOR (NOT OR) ABQ 001 010 100 110

22. Exclusive NOR ABQ 001 010 100 111 Equality Detector

23. Summary Summary for all 2-input gates InputsOutput of each gate A B ANDNAND OR NORXORXNOR 00010101 01011010 10011010 11101001