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Memory and Programmable Logic Dr. Ashraf Armoush © 2010 Dr. Ashraf Armoush
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Outline Memory Unit – Random Access Memory (RAM) – Read-Only Memory (ROM) Programmable Logic Array (PLA) Programmable Array Logic (PAL) Sequential (or Simple) Programmable Logic Device (SPLD) Complex Programmable Logic Devices (CPLD) Field Programmable Logic Array (FPGA) 2 © 2010 Dr. Ashraf Armoush, An-Najah National University
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RAM Random Access Memory ( RAM ) A memory unit stores binary information in groups of bits called words Most computer memories use words that are multiples of 8 bits in length Communication between memory and its environment is achieved through: – Data input and output lines – Address selection lines – Control lines (direction) The memory unit is specified by: – the number of words – the number of bits in each word 3 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Ex: A memory unit with a capacity of 1K words of 16 bits each. the memory can accommodate 2,048 = 2K bytes 4 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Types of RAM : Static RAM (SRAM): consists of internal latches that store the binary information. The stored information remains valid as long as power is applied to the unit. SRAM is easier to use and has shorter read and write cycles The memory cell typically contains 6 transistors Dynamic RAM (DRAM) stores the binary information in the form of electric charges on capacitors gated by a MOS transistors. The stored charge tends to discharge with time. The capacitors must be periodically recharged by refreshing the dynamic memory. DRAM offers reduced power consumption and larger storage capacity in a single memory chip. A single MOS transistor and a capacitor for each DRAM cell. 5 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Read Only Memory (ROM) 6 © 2010 Dr. Ashraf Armoush, An-Najah National University ROM: a memory storage device that stores permanent binary information. The stored information stays within the unit even when power is turned off and on again (nonvolatile). Internally, a ROM can be implemented using a Decoder & a number of OR gates equal to the number of outputs.
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Internal Logic of a ROM : 7 © 2010 Dr. Ashraf Armoush, An-Najah National University Fuses
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ROM Programming : The hardware procedure that programs the ROM blows fuse links in accordance with a given truth table. – 0 : No Connection (a blown fuse) – 1 : Connection (an intact fuse) 8 © 2010 Dr. Ashraf Armoush, An-Najah National University InputsOutputs I4I4 I3I3 I2I2 I1I1 I0I0 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 0000010110110 0000100011101 0001011000101 000111011--1-............ 1110000001001 1110111100010 1111001001010 1111100110011
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ROM Programming (Cont.) : 9 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Ex: Design a combinational circuit using a ROM to generate the square of 3-bit input number 10 © 2010 Dr. Ashraf Armoush, An-Najah National University A2A2 A1A1 A0A0 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 000000000 001000001 010000100 011001001 100010000 101011001 110100100 111110001 F1F1 F2F2 F3F3 F4F4 0A0A0
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11 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Types of ROMs : ROM (Mask Programming): is done by the semiconductor company during the last fabrication process of the unit. PROM (Programmable ROM): – The fuses in the PROM are blown by the application of a high-voltage pulse to the device through a special pin (Programming is irreversible). – Special instruments are called PROM programmers. EPROM (Erasable PROM): – Electrically Programmable – Can be restructured to the initial state (erased) by using a special ultraviolet light for a given length of time. EEPROM (Electrically Erasable PROM): – Electrically Programmable. – Electrically Erasable. FLASH Memory Devices: – They are similar to the EEPROMs, but with additional built-in circuitry to selectively program and erase the device in-circuit, without the need for a special programmer. 12 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Programmable Logic Array (PLA) Unlike the ROM, PLA does not generate all the minterms. The decoder is replaced by an array of AND gates that can be programmed to generate any product term of the input variables – AND array : Programmable – OR array: Programmable Ex1: F1 = AB’ + AC + A’BC’ F2 = (AC + BC)’ { 3 Inputs, 4 Product Terms (AND), 2 outputs (OR)} 13 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Ex 1 (cont.) 14 © 2010 Dr. Ashraf Armoush, An-Najah National University
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Ex2: 15 © 2010 Dr. Ashraf Armoush, An-Najah National University Implement the following two Boolean functions with a PLA: Use the combination that gives the minimum number of product terms. (F 1 ’, F 2 ) – C: Complement output – T: True output
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