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COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM.

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Presentation on theme: "COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM."— Presentation transcript:

1 COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM 2009

2 Encoder Encoding - the opposite of decoding - the conversion of an m- bit input code to a n-bit output code with n  m  2 n such that each valid code word produces a unique output code An encoder is a circuit that changes a set of signals into a code. An encoder has 2 n (or fewer) input lines and n output lines which generate the binary code corresponding to the active input Typically, an encoder converts a code containing exactly one bit that is 1 to a binary code corresponding to the position in which the 1 appears........ n outputs 2 n inputs 2 n -to-n Encoder Ahmad Almulhem, KFUPM 2009

3 8-to-3 Encoder Description: 2 3 = 8 inputs, 3 outputs one input =1, others = 0’s Each input generate unique binary code Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2

4 8-to-3 Encoder (truth table) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111

5 8-to-3 Encoder (truth table) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 1000000010000000 000000 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111

6 8-to-3 Encoder (truth table) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 0100000001000000 100100 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111

7 8-to-3 Encoder (truth table) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 0000010000000100 101101 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111

8 8-to-3 Encoder (truth table) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 0000000100000001 111111 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111

9 8-to-3 Encoder (equations) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111 Note: This truth table is not complete! Why? Output equations: A 0 = ? A 1 = ? A 2 = ?

10 8-to-3 Encoder (equations) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111 Output equations: A 0 = D 1 + D 3 + D 5 + D 7 A 1 = ? A 2 = ?

11 8-to-3 Encoder (equations) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111 Output equations: A 0 = D 1 + D 3 + D 5 + D 7 A 1 = D 2 + D 3 + D 6 + D 7 A 2 = ?

12 8-to-3 Encoder (equations) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111 Output equations: A 0 = D 1 + D 3 + D 5 + D 7 A 1 = D 2 + D 3 + D 6 + D 7 A 2 = D 4 + D 5 + D 6 + D 7

13 8-to-3 Encoder (circuit) Ahmad Almulhem, KFUPM 2009 8-to-3 Encoder D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D7 A0A1A2A0A1A2 Output equations: A 0 = D 1 + D 3 + D 5 + D 7 A 1 = D 2 + D 3 + D 6 + D 7 A 2 = D 4 + D 5 + D 6 + D 7 A0A1A2A0A1A2 D1D3D5D7D1D3D5D7 D2D3D6D7D2D3D6D7 D4D5D6D7D4D5D6D7

14 8-to-3 Encoder (Limitations!) Ahmad Almulhem, KFUPM 2009 Output equations: A 0 = D 1 + D 3 + D 5 + D 7 A 1 = D 2 + D 3 + D 6 + D 7 A 2 = D 4 + D 5 + D 6 + D 7 inputsoutputs D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 A2A2 A1A1 A0A0 00000001000 00000010001 00000100010 00001000011 00010000100 00100000101 01000000110 10000000111 Two Limitations: 1. Two or more inputs = 1 Example: D 3 = D 6 = 1 A 2 A 1 A 0 = 111 2.All inputs = 0 Same as D 0 =1

15 Priority Encoder It addresses the previous two limitations: 1.Two or more inputs = 1 It considers the bit with highest priority 2.All inputs = 0 Add another output v to indicate this combination Ahmad Almulhem, KFUPM 2009

16 4-to-2 Priority Encoder Ahmad Almulhem, KFUPM 2009 Description: 2 2 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priority

17 4-to-2 Priority Encoder Ahmad Almulhem, KFUPM 2009 inputsoutputs D3D3 D2D2 D1D1 D0D0 A1A1 A0A0 V 0000XX0 0001001 001X011 01XX101 1XXX111 Description: 2 2 = 4 inputs, 2 + 1 outputs If we have two or more 1’s, take the highest priority This is a condensed truth table! It has only 5 rows instead of 16! Row 3 = 2 combinations Row 4 = 4 combinations Row 5 = 8 combinations

18 4-to-2 Priority Encoder Ahmad Almulhem, KFUPM 2009 inputsoutputs D3D3 D2D2 D1D1 D0D0 A1A1 A0A0 V 0000XX0 0001001 001X011 01XX101 1XXX111 Description: 2 2 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priority Equations: A 0 = D 3 + D 1 D 2 ’ A 1 = D 2 + D 3 V= D 0 + D 1 + D 2 + D 3

19 4-to-2 Priority Encoder Ahmad Almulhem, KFUPM 2009 inputsoutputs D3D3 D2D2 D1D1 D0D0 A1A1 A0A0 V 0000XX0 0001001 001X011 01XX101 1XXX111 Description: 2 2 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priority Equations: A 0 = D 3 + D 1 D 2 ’ A 1 = D 2 + D 3 V= D 0 + D 1 + D 2 + D 3


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