1. Silicon pad detectors for LCCAL: characterisation and first results Antonio Bulgheroni University of Milan – Italy on behalf of LCCAL: Official INFN R&D project, official DESY R&D project PRC R&D 00/02 Contributors (Como, LNF, Padova, Trieste): M. Alemi, M.Bettini, S. Bertolucci, E. Borsato, M. Caccia, P.Checchia, C. Fanin, G. Fedel, J. Marczewski, S. Miscetti, M. Nicoletto, M. Prest, R. Peghin, L. Ramina, E. Vallazza.

2. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Calorimeter Layout Absorber ScintillatorSilicon pad detectors 25 x 25 x 0.3 cm 3 25 Cells 5 x 5 cm 2 3 layers 725 Pads ~ 1 x 1 cm 2 2, 6 and 12 X 0 Total of 50 layers 27 X 0

3. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Sensor details Main characteristics: –Sensor thickness: 300  m –Resistivity: 4-6k  –AC coupling Silicon dioxide thickness: 265 nm –Bias grid and guard ring 3M  bias resistors Symmetric structure Guard ring pad Bias pad 7 cm 6 cm ~0.9 cm

4. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Hybridisation details Hybridisation through conductive glue Analogue Readout Chip: VA-HDR9c (IdeAs) –VA  Viking family –HDR  High dynamic range –9c  Four selectable gains Gain* [mv/fC] Dynamic Range [mip] 3.3± 100 2.5± 140 1.7± 200 1.2± 300 *Measured value

5. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Motherboard design 6 sensors per motherboard with serial readout. Status of production: –16 sensors available –2 motherboards fully and 1 partially equipped Signal routing through Erni connectors

6. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Test beam: preliminary results* Two electrons with energy 750 MeV X silicon chambers Y silicon chambers First layer Second layer Third layer Cluster recognition *Plots filled only with pads with SNR>10 

7. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 How we get there: details of the sensor characterisation 2 technological runs First batch of 11 sensors (spring ’02) Second batch of 9 sensors (summer ’02) Next batch available in summer ‘03

8. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Measurement setup KI 590 & 595 HF & QS CV meters SCS 4200 With 2 SMU Manual prober

9. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 I – V Measurement: the method Total and bias current measured directly by an SMU Guard ring current calculated from the others two A A SMU2 SMU1 Total Bias Guard ring

10. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 I – V measurements: the results High guard-ring current (> 50  A) Dicing edge too close to the guard ring structure, but it works and the sensor performances are NOT spoiled! n n+ Depletion region metal p+ Cutting edge Guard ring Solution: keep the cutting edge far away from the guard ring!

11. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Soft breakdown Bias current reasonable (few  A) Strange shape with a “soft” breakdown n+ or metal shallow impurities on the backplane Metal n n+ Impurities Depletion region Solution: replace the implanted backside contact with a diffused one, but …

12. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 I – V Characteristics BATCH 12 Total wafers produced11 Rejected wafers1 Mean depl. voltage32.5 V Mean bias current @ depl. 2.1  A BATCH 13 Total wafers produced9 Rejected wafers2 Mean depl. voltage26.6 V Mean bias current @ depl. 0.8  A

13. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 C – V measurements Useful technique to calculate the depletion voltage Quite uniform behaviour of the depletion voltage YIELD Batch 12Batch 13 Not depleted pads 0/4208/294

14. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 “Leaky” pads: the discovery In batch 12: the great part (90%) of the pads seems to be DC coupled In batch 13: only few percents

15. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 “Leaky” pads: the explanation No pin holes in SiO 2 Surface leakage  residua of polysilicon after the etching of the polysilicon layer Equivalent circuit with two opposite diodes. Polysilicon residua Readout metal Al bridge Resistor Bias grid

16. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 “Leaky” pads: the solution External AC coupling  SMD capacitors on the PCB Next batch will be DC coupled with external capacitors It will improve also the quality of the p-n junction reducing the thermal budget SMD capacitor

17. ECFA – DESY Amsterdam, 1 st – 4 th April ‘03 Summary Three motherboards equipped with 16 sensors First test beam on going Yield satisfactory New batch with simpler technology has been started yet promising a better yield