1. The World Leader in High-Performance Signal Processing Solutions 1.ADCs - Ping-Pong Architectures 2.ADCs – Driving Them 3.DACs – Sinc Compensation 4.DACs – Glitches 5.What They Didnt Teach You in School Optimizing Data Converters for High Frequency Operation

2. 1.1 Ping Pong ADCs References Analog Dialogue 37-8 (August 2003) Analog Dialogue 39-5 (May 2005) http://www.v-corp.com/ Do a Patent Search on Inventor: Velazquez; Classification: 341/118

3. 1.2 Nyquist Theorem Limits Frequency Bandwidth

4. 1.3 Ping-Pong ADCS Architecture

5. 1.4 Ping-Pong ADCS Raw Spectral Response

6. 1.5 Ping-Pong ADCS Matching Requirements Performance Requirement at 180 MHz SFDR (dBc) Gain Matching (%) Aperture Matching (fsec) 12 Bits74.040 12 Bits740350 12 Bits74.02300 14 Bits86.010 14 Bits86088 14 Bits86.00577

7. 1.6 Advanced Filter Bank (AFB) Reduces Spurs Due to ADC Mismatch

8. 1.7 Ping Pong ADCs Trimmed SFDR

9. 1.8 Ping Pong ADCs Temperature Effects

10. 1.9 Linear Error Compensation (LinComp) Corrects for Non-Linearities

11. 1.10 Driving ADCs References Analog Dialogue 39-4 (April 2005) Analog-Digital Conversion Seminar (2004)

12. 1.11 Transformer Coupling Gives Best High Frequency Performance

13. 1.12 ADC Drive

14. 1.13 Dual Transformers Improve Balance at High Frequencies

15. 1.14 Baluns Have a Wider Frequency Response

16. 1.15 Applying Voltage Gain Can Improve Noise Performance

17. 1.16 DACs Some Things You May Not Have Thought Of Sinc Compensation Effects Glitch Energy

18. 1.17 DACs Suffer From Sinc Response Frequency (xFs) dB

19. 1.18 Use Sinc Compensation to Reduce Passband Droop Frequency (xFs) dB

20. 1.19 Passband is Flat But There is 3.5 dB Insertion Loss Frequency (xFs) dB

21. 1.20 Sinc Compensation Doesnt Work So Well at Super Nyquist Bands Frequency (xFs) dB

22. 1.21 AD9779 Vs AD9777 Time Domain Plot AD9777AD9779 Both DACs synthesizing a 1MHz sine wave in 1x interpolation mode with a 160MSPS clock rate. Due to the unique output stage of the AD9779, its time domain waveform has much more glitch energy than the AD9777

23. 1.22 Glitches Are Worse but Noise Floor is Better

24. 1.23 Glitches Are Worse but 3rd Order IMD Is better

25. 1.24 Things They Dont Teach You In School Watch ALL your inputs Proper Decoupling Differential Signaling Clean Your Clock

26. 1.25 How many Inputs Does a Data Converter Really Have? "QUIET DIGITAL BUFFER LATCH NOISY DATA BUS = DIGITAL GROUND PLANE D A AGNDDGND IAIA IDID B A = ANALOG GROUND PLANE Analog I/O C STRA Y A A D A A V D D A ANALOG CIRCUITS A Reference VAVA VDVD DIGITAL CIRCUITS C STRA Y Clock

27. 1.26 Power Supply Decoupling Must Be Effective at Very High Frequencies

28. 1.27 Why Differential Signaling?

29. 1.28 How Clean Does Your Clock Need To Be 1101001000 0.1 1 10 100 1000 330300 0.3 3 30 300 FULL-SCALE ANALOG INPUT FREQUENCY (MHz) tjtj (ps) 16 14 12 10 8 6 0.1 0.3 1 3 10 30 100 300 1000 18 4 tjtj (ps) ENOB = SNR –1.76dB 6.02 0.03 PLL WITH VCO PLL WITH VCXO DEDICATED LOW NOISE XTAL OSC

30. 1.29 In Conclusion Hopefully you learned something Getting good high-frequency performance is tough But there are some things you can do to get the best performance you can Thank you for your kind attention Please talk to you friendly local ADI Sales Engineer when youre ready to start your next design