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Chap. 1 Overview of Digital Design with Verilog
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2 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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3 Evolution of Computer Aided Digital Design Digital circuits were designed with Vacuum tubes Transistors Integrated circuits (ICs) SSI MSI : hundreds of gates LSI : thousands of gates CAD techniques began to evolve circuit and Logic simulation about 100 transistors VLSI : more than 100,000 transistors ULSI : Ultra Large Scale Integration
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4 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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5 Emergence of HDLs Hardware Description Language (HDL) Allowed designed to model the concurrency of processes found in hardware elements Verilog HDL originated in 1983 VHDL was developed under contract from DARPA Could be used to describe digital circuits at a register transfer level (RTL) Specify how the data flows between registers and how the design processes the data Logic synthesis tools can be used to produce gate-level netlist from the RTL description automatically
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6 Different Levels of Abstraction Architecture / Algorithm Level Describe the functionality (behavior) of a circuit Register Transfer Logic (RTL) Level Describe the data flow of a circuit Gate Level Describe the connectivity (structure) of a circuit Switch Level
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7 An Example of Verilog HDL
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8 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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9 1.3 Typical Design Flow
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10 Design Flow of using HDL
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11 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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12 Why use the HDL ? Difficult to design directly on hardware Mixed-level modeling and simulation Easier to explore different design options Reduce design time and cost
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13 Advantages of HDLs Advantages compared to traditional schematic-based design Design with RTL description + logic synthesis tool Abstract level Independent to fabrication technology Reuse when fabrication technology changing Functional verification can be done early Optimized to meet the desired functionality Analogous to computer programming Textual description with comments
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14 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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15 History of the Verilog HDL 1984: Gateway Design Automation introduced the Verilog-XL digital logic simulator The Verilog language was part of the Verilog-XL simulator The language was mostly created by 1 person, Phil Moorby The language was intended to be used with only 1 product 1989: Gateway merged into Cadence Design Systems 1990: Cadence made the Verilog HDL public domain Open Verilog International (OVI) controlled the language
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16 History of the Verilog HDL (Cont ’ d) 1995: The IEEE standardized the Verilog HDL (IEEE 1364) 2001: The IEEE enhanced the Verilog HDL for modeling scalable designs, deep sub- micron accuracy, etc.
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17 Useful Features of the Verilog HDL A general-purpose HDL Easy to learn and use Syntax is similar to C (VHDL is similar to PASCAL) Allows different levels of abstraction to be mixed in the same model In terms of switches, gates, RTL, or behavioral code Need to learn only for stimulus and hierarchical design Most popular logic synthesis tools support Verilog Rich of Verilog HDL libraries Provided by fabrication vendors for postlogic synthesis simulation Allows the widest choice of vendors while designing a chip With powerful PLI (Programming Language Interface) Write custom C code to interact with internal data structure
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18 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence of HDLs Typical design flow Importance of HDLs Popularity of Verilog HDL Trends in HDLs
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19 Trends in HDLs Higher levels of abstraction Think only in terms of functionality for designers CAD tools take care of the implementation details Behavioral modeling Design directly in terms of algorithms and the behavior of the circuit Formal verification Supports for Mixed-level design Ex: very high speed and timing-critical circuits like μPs Mix gate-level description directly into the RTL description System-level design in a mixed bottom-up methodology Use either existing Verilog modules, basic building blocks, or IPs Ex: SystemC for SoC designs
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