1. Status of Detector Prototype (for Hawaii meeting at Big Island) August 24, 2002 Yee Bob Hsiung For Koji Ueno, Yuri Velikzhanin Yanan Guo and Eddie Huang

2. First Simple Prototype  Optical – commercial Fresnel Lens (NTK- F300, f30cm, size=30cm, pitch=0.5mm, PMMA UV), UV filter (BG3)  MAPMT – Hamamatsu 4x4 (H6568) or 8x8 (H7546)  Readout electronics – Preamp, Receiver, Trigger, ADC and DAQ

3. Checking Fresnel Lens

4. Focal Spot Size at Center

5. Focal Spot Size 8cm Off Center

6. Readout Setup PMT Preamp. Freshnell lens UV filter Hamamatsu PMT 8x8 or 4x4 1 or 4 16-channels preamplifiers Receiver 2 or 8 8-channels receivers Trigger ADCDAQ 64-channels Acromag ADC 64-channels Trigger module VME At PC, Visual C++ based

7. Hamamatsu MAPMT test Anode Uniformity of different channels Measured at NTU Data from Hamamatsu Broken PMT

8. Hamamatsu MAPMT test A Anode sensitivity (sum of 64 channels) Broken PMT

9. Preamplifier schematics + - From PMT + - From PMT Current sensitive version (current -> voltage) Charge Sensitive version (charge -> voltage) to save space on receiver Power supply (16-channels preamplifier): 380mA on +/- 5V (3.8W, 240mW/channel)

10. Waveform ~ exp(-t/T), T~1uS Preamplifier test with test pulse Q~3*10^6 e (~10 photons)

11. Signals with different polarity look equally Preamplifier test with test pulse Q~3*10^6 e (~10 photons)

12. Response on pulse to LED Typical minimum voltage needed for LED lighting is 2-2.5 V

13. Response on pulse to LED Response on two photons with ~ 2 us delay

14. Receiver's Single channel schematics + - Shaper Comparator LVDS transmitter To Trigger From preamp. 100 nS Delay line To ADC (one from these two outputs) Peak & Hold Control from Trigger here are some problems (another PCB is needed) We could use these outputs for prototype test

15. D BA C NIM input NIM output DONE - + - + 1 16 - + - + 1 16 OUTPUT Universal VME Mother-board XCS10-tq144 Mezzanine board XCS30XL-tq144 GND EVENT GND LVDS-2 LVDS-1 - + TTL-S A,B,C,D: 4 34pin IDE connectors which accept 64 LVDS Inputs from receivers EVENT To receivers Only the last receiver terminated To ext. trigger of IP341s Front Panel Trigger module

16. Cluster Hit: signal from an anode exceeds threshold. Geometric Trigger: Count: hit number >= N (preset, 3~7); Geom: a cell and any of its 8 adjacent cells are hit. self neighbors Processed by Other ‘self’ Trigger module Trigger logic: two hits in adjacent cells + one hit at any place

17. Trigger Waveform LVDS input LVDS output EVENT_T output settings: CSR=67 Delay=2 Width=4 Dead-time=20 Max #=255 Masks=-1 Jitter due 40Mhz operating clock

18. Data acquisition ADCSBSPC Windows, Visual C++ Tested DAQ speed (64-channels version) with test pulse to ADC: 800 events/sec. ADC data On line trigger BufferRAM Hard disc Histograms Hard disc DAQ schematics VME

19. Data acquisition Start Pause Clear Save Data Save Histograms Toolbar:

20. Data acquisition (16-channels version) Last event monitor Hit Sum monitors Event rate Last triggered event Sum triggered events Triggered event rate Trigger settings Full Sum monitors System status monitor ADC base adderess Number of stored events ADC FIFO monitor Buffer size monitor Memory used Histograms monitor

21. Data acquisition (64-channels version)

22. Summary  In the past 3 months, we have tried to develop and put together a complete system for the first simple prototype with commercial Fresnel lens  Bench test for readout electronics are nearly done  Bench test for the first simple prototype will follow

23. Near Future Hardware Plan  Finish the lab bench test of the simple prototype  Background survey at Mt. Lu-Lin in Taiwan as a field test for the prototype in September or October.  Plan a background survey at Mt. Hualalai.