1. RF System On Chip Quadrature VCO Comparison1/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. Fortià Vila Vergés 19th June 2007 Introduction Design procedure Comparison Conclusions Design and comparison of several 2.5-GHz CMOS Quadrature VCO using Epson CTH180nm technology Design and comparison of several 2.5-GHz CMOS Quadrature VCO using Epson CTH180nm technology

2. RF System On Chip Quadrature VCO Comparison2/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. 1 1 Introduction 2 2 Design procedure 3 3 Coupling capacitors VCO 4 4 Common point VCO 5 5 Crossed capacitors VCO 6 6 Conclusions

3. RF System On Chip Quadrature VCO Comparison3/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B.  VCO Introduction  Quadrature  Amplitude & Stabilization Time  Phase noise

4. RF System On Chip Quadrature VCO Comparison4/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B.  Fixed parameters Design Procedure  Capacitance  Transconductance  Transistors design  Power consumption<1mW  High Q inductor (19-6.8nH).  High PSRR rejection.  Low power supply (1.2V)  Coarse with a capacitor bench  Fine with the varactor  Source degradation  Capacitive Q  Transistor losses  Load impedance  Start-up  W/L=600  L=180nm  W=100μm  Differential LC-tank topology  RF frequency 2.5GHz

5. RF System On Chip Quadrature VCO Comparison5/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B.  Schematic Coupling Transistors VCO  Quadrature generator  Design quadrature ratio  Better phase noise  Worse phase error

6. RF System On Chip Quadrature VCO Comparison6/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. Coupling Transistors VCO  Stabilization time & Vp  Phase error  Output power & phase noise  Noise summary  Biasing: 7.860e-13 81%  Quadrature: 5.36692e-14 6%

7. RF System On Chip Quadrature VCO Comparison7/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B.  Schematic Common Point VCO  Quadrature generator  Main idea  Odd harmonics in differential mode  Even harmonics in common mode

8. RF System On Chip Quadrature VCO Comparison8/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. Common Point VCO  Stabilization time & Vp  Phase error  Output power & phase noise  Noise summary  Bias: 6.08e-13 78.6%  Quadrature: 3.31e-15 0.42%

9. RF System On Chip Quadrature VCO Comparison9/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B.  Schematic Crossed Capacitors VCO  Quadrature generator  Biasing solution  Transmission gate

10. RF System On Chip Quadrature VCO Comparison10/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. Crossed Capacitors VCO  Stabilization time & Vp  Phase error  Output power & phase noise  Noise summary  Bias: 5.16e-15 8.5%  Quadrature: 6.29e-18 0.1%

11. RF System On Chip Quadrature VCO Comparison11/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. Comparison Coupled Transistors VCO Common Point VCO Crossed Capacitors VCO Output Voltage Signal (Vp) 530mV580mV450mV Stabilization Time 90ns35ns180ns Phase Error3º1º0.1º Phase Noise-109.4 dBc-110.2 dBc-121.3dBc Min. Harmonic difference -50 dBm-52 dBm-48 dBm

12. RF System On Chip Quadrature VCO Comparison12/12 Fortià Vila VergésUniversitat Politecnica de Catalunya E.T.S.E.T.B. 1 1 This results are under a low power consumption, low power supply & high PSRR context. 2 2 Using short channel transistors degrade the gain. 3 3 Technology mismatch it’s another important factor. 4 4 Avoid transistors if we can use passive elements. 5 5 Noise contribution has more to do with a topology than a device. Conclusions