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Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.

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Presentation on theme: "Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design."— Presentation transcript:

1 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design

2 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 2 MIB Block Diagram

3 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 3 Embedded Controller Infineon TRICore TC11IB  System On a CHIP  12 MHZ External Clock  1.5 MBytes RAM  Hardware, Software & Watchdog Resets  Sleep Modes  Six Thirty-Two Bit Timers

4 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 4 Embedded Controller Infineon TC11IB – Interfaces  Media Independent Interface (Ethernet)  Two Asynchronous Serial Ports  One Synchronous Serial Port (SPI)  External Bus Unit (EBU)

5 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 5 Ethernet Interface Ethernet Interface – 100 MBits/second  Translation Chip – Intel LXT971A  Fiber Optic Transceiver – Infineon V23809-C8-C10

6 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 6 Flash Memory  Serial Flash or Parallel Flash (8MByte)  Serial Flash?  Parallel Flash – AMD Am30LV0064D  All Code Documented

7 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 7 Power & Reset Logic  Power Regulator & Supervisor  Texas Instruments TPS70351PWP  Watchdog Protection – TC11IB  Devices will get User Reset and MIB Reset  Devices Must Reset into Safe Condition

8 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 8 Timing Logic  19.2 Hz Timing Signal (Heartbeat)  1 PPS Timing Signal?  10 Second Timing Signal?  Devices May Require Precise Timing  Hardware Timing

9 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 9 Parallel Interface  External Bus Unit  Thirty-Two Bits Data Transfer (8, 16 or 32)  Address Lines (Twenty-Four Possible)  Texas Instruments SNLVTH32(244/245)  LVTTL Outputs, TTL Compatible

10 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 10 Control Logic  Peripheral Interface Signals  RD*, WR*, ALE, WAIT*, CS* Lines  Resets*, SPI, etc.  Texas Instruments SNLVTH32244  LVTTL Outputs, TTL Compatible

11 Author Wayne M. Koski EVLA Monitor & Control Software PDR May 14 & 15, 2002 11 Serial Interfaces  Asynchronous Ports  One RS232 Modem Port (Auto Off) Maxim MAX3225CAP  RS485 Port?  Synchronous Ports  Serial Peripheral Interface Port – SPI


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