1. Voltage Divider Bias ENGI 242 ELEC 222

2. 23 February 2005ENGI 242/ELEC 2222 BJT Biasing 3 For the Voltage Divider Bias Configurations Draw Equivalent Input circuit Draw Equivalent Output circuit Write necessary KVL and KCL Equations Determine the Quiescent Operating Point –Graphical Solution using Load lines –Computational Analysis Design and test design using a computer simulation

3. 23 February 2005ENGI 242/ELEC 2223 Voltage-divider bias configuration

4. 23 February 2005ENGI 242/ELEC 2224 Voltage Divider Input Circuit Approximate Analysis This method is valid only if R 2 .1  R E Under these conditions R E does not significantly load R 2 and it may be ignored: I B << I 1 and I 2 and I 1  I 2 Therefore: We may apply KVL to the input, which gives us: -V B + V BE + I E R E = 0 Solving for I E we get:

5. 23 February 2005ENGI 242/ELEC 2225 Input Circuit Exact Analysis This method is always valid must be used when R 2 >.1  R E Perform Thevenin’s Theorem Open the base lead of the transistor, and the Voltage Divider bias circuit is: Calculate R TH We may apply KVL to the input, which gives us: -V TH + I B R TH + V BE + I E R E = 0 Since I E = (  + 1) I B

6. 23 February 2005ENGI 242/ELEC 2226 Redrawing the input circuit for the network

7. 23 February 2005ENGI 242/ELEC 2227 Determining V TH

8. 23 February 2005ENGI 242/ELEC 2228 Determining R TH

9. 23 February 2005ENGI 242/ELEC 2229 The Thévenin Equivalent Circuit Note that V E = V B – V BE and I E = (  + 1)I B

10. 23 February 2005ENGI 242/ELEC 22210 Input Circuit Exact Analysis We may apply KVL to the input, which gives us: -V TH + I B R TH + V BE + I E R E = 0 Since I E = (  + 1) I B

11. 23 February 2005ENGI 242/ELEC 22211 Collector-Emitter Loop

12. 23 February 2005ENGI 242/ELEC 22212 Collector-Emitter (Output) Loop Applying Kirchoff’s voltage law: - V CC + I C R C + V CE + I E R E = 0 Assuming that I E  I C and solving for V CE : Solve for V E : V E = I E R E Solve for V C : V C = V CC - I C R C or V C = V CE + I E R E Solve for V B : V B = V CC - I B R B or V B = V BE + I E R E

13. 23 February 2005ENGI 242/ELEC 22213 Voltage Divider Bias Example 1 V CC = 22V R 1 = 39k  R 2 = 3.9k  R C = 10k  R E = 1.5k   = 140

14. 23 February 2005ENGI 242/ELEC 22214 Voltage Divider Bias Example 2 V CC = 18V R 1 = 39k  R 2 = 8.2k  R C = 3.3k  R E = 1k   = 120

15. 23 February 2005ENGI 242/ELEC 22215 Voltage Divider Bias Example 3 V CC = 16V R 1 = 62k  R 2 = 9.1k  R C = 3.9k  R E =.68k   = 80

16. 23 February 2005ENGI 242/ELEC 22216 Design of CE Amplifier with Voltage Divider Bias 1.Select a value for V CC 2.Determine the value of  from spec sheet or family of curves 3.Select a value for I CQ 4.Let V CE = ½ V CC (typical operation, 0.4 V CC ≤ V C ≤ 0.6 V CC ) 5.Let V E = 0.1 V CC (for good operation, 0.1 V CC ≤ V E ≤ 0.2 V CC ) 6.Calculate R E and R C 7.Let R 2 ≤ 0.1  R E (for this calculation, use low value for  ) 8.Calculate R 1

17. 23 February 2005ENGI 242/ELEC 22217 CE Amplifier Design Design a Common Emitter Amplifier with Voltage Divider Bias for the following parameters: V CC = 24V I C = 5mA V E =.1V CC V C =.55V CC  = 135

18. 23 February 2005ENGI 242/ELEC 22218

19. 23 February 2005ENGI 242/ELEC 22219 CE Amplifier Design

20. 23 February 2005ENGI 242/ELEC 22220 CE Amplifier Design Voltage Divider Bias

21. Collector Feedback Bias ENGI 242 ELEC 222

22. 23 February 2005ENGI 242/ELEC 22222 BJT Biasing 4 For the Collector Feedback Bias Configuration: Draw Equivalent Input circuit Draw Equivalent Output circuit Write necessary KVL and KCL Equations Determine the Quiescent Operating Point –Graphical Solution using Loadlines –Computational Analysis Design and test design using a computer simulation

23. 23 February 2005ENGI 242/ELEC 22223 DC Bias with Collector (Voltage) Feedback Another way to improve the stability of a bias circuit is to add a feedback path from collector to base In this bias circuit the Q-point is only slightly dependent on the transistor 

24. 23 February 2005ENGI 242/ELEC 22224 Base – Emitter Loop Solve for I B Applying Kirchoff’s voltage law: -V CC + I C R C + I B R B + V BE + I E R E = 0 Note: I C = I E = I C + I B Since I E = (  + 1) I B then: -V CC + (  + 1)I B R C + I B R B + V BE (  + 1)I B R E = 0 Simplifying and solving for I B :

25. 23 February 2005ENGI 242/ELEC 22225 Applying Kirchoff’s voltage law: -V CC + I E R C + I B R B + V BE + I E R E = 0 Since I E = (  + 1) I B then: Simplifying and solving for I E : Base – Emitter Loop Solve for I E

26. 23 February 2005ENGI 242/ELEC 22226 Collector Emitter Loop Applying Kirchoff’s voltage law: I E R E + V CE + I C R C – V CC = 0 Since I C = I E and I E = (  + 1) I B : I E (R C + R E ) + V CE – V CC =0 Solving for V CE :V CE = V CC – I E (R E + R C )

27. 23 February 2005ENGI 242/ELEC 22227 Network Example

28. 23 February 2005ENGI 242/ELEC 22228 Network Example

29. 23 February 2005ENGI 242/ELEC 22229 Collector feedback with R E = 0 

30. 23 February 2005ENGI 242/ELEC 22230 Design of CE Amplifier with Collector Feedback Bias 1.Select a value for V CC 2.Determine the value of  from spec sheet or family of curves 3.Select a value for I EQ 4.Let V CE = ½ V CC (typical operation, 0.4 V CC ≤ V C ≤ 0.6 V CC ) 5.Let V E = 0.1 V CC (for good operation, 0.1 V CC ≤ V E ≤ 0.2 V CC ) 6.Calculate R E, R C and R B

31. Common Emitter Bias with Dual Supplies

32. 23 February 2005ENGI 242/ELEC 22232 Voltage Divider Bias with Dual Power Supply

33. 23 February 2005ENGI 242/ELEC 22233 Voltage Divider Bias with Dual Power Supply Input Circuit Find V TH and R TH

34. 23 February 2005ENGI 242/ELEC 22234 Voltage Divider Bias with Dual Power Supply Output Circuit

35. 23 February 2005ENGI 242/ELEC 22235 Voltage Divider Bias with Dual Power Supply

36. PSpice Simulation

37. 23 February 2005ENGI 242/ELEC 22237 PSpice Bias Point Simulation

38. 23 February 2005ENGI 242/ELEC 22238 PSpice Simulation for DC Bias

39. 23 February 2005ENGI 242/ELEC 22239 PSpice Simulation for DC Sweep

40. 23 February 2005ENGI 242/ELEC 22240 PSpice Simulation for DC Sweep The response of V CE demonstrates that it reaches a peak value near the Q point and then decreases The response of V C demonstrates rises rapidly towards the Q Point and then increases gradually towards a maximum value

41. 23 February 2005ENGI 242/ELEC 22241 PSpice Simulation for AC Sweep

42. 23 February 2005ENGI 242/ELEC 22242 PSpice Simulation for AC Sweep