1. 8.1 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Chapter 08 Main Memory (Page table questions)

2. 8.2 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Memory Address Translation Scheme Logical Address generated by CPU is divided into: Page number (p) – used as an index into a page table which contains base address of each page in physical memory Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit For given logical address space 2 m and page size 2 n page number page offset p d m - n n

3. 8.3 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Page table structure So each address has both page number and offset number: as X bits page number Y bits offset number Logical address would be XY If x=2 and m =4 indicates that a page can have 2 4 addresses i.e. 16 addresses or 16 bytes and there are two frames only

4. 8.4 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Example Example: if the logical address is 0xAEF9 having a page size of 256 bytes, what is the page number? Page size as 256 = 2 8 total addresses or offset 8 bits are used for offset = F9 Left 8 bits are for page number = AE

5. 8.5 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Example If 18 bits are used to represent an entry in a conventional page table, how many entries would be there? Answer = 2^18 = 262144

6. 8.6 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Example Consider a logical address with a page size of 8 KB. How many bits must be used to represent the page offset in the logical address? 8 KB = 8 * 1024 = 8192 bytes = 2^13 Answer = 13 bits

7. 8.7 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Example Consider a 32-bit address for a two-level paging system with an 8 KB page size. The outer page table has 1024 entries. How many bits are used to represent the second-level page table? 32 bit is divided into Level 1+ level 2+ offset Level 1 = 1024 entries = 2^10 = 10 Page size = 8 kb = 2^13 bits = 13 Total 32 so remainder is 32-(10+13) = 9 bits

8. 8.8 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Consider a logical address space of 64 pages of 1,024 words each, mapped onto a physical memory of 32 frames. how many bits are there in the logical address? How many bits are there in the physical address? Answer: Logical address: 16 bits Physical address: 15 bits

9. 8.9 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Practice Question Consider the following segment table: Segment Base Length 0 219 600 1 2300 14 2 90 100 3 1327 580 4 1952 96 What are the physical addressed for the following logical addresses? a) 0,430 -> 219 + 430 = 649 b) 1,10 -> 2300+10 = 2310 c) 2,500 -> 90+500 -> Invalid as length is 100 only d) 3,400 -> 1327 + 300 = 1637 e) 4,112 -> 1952 + 112 -> invalid as length is 96 only

10. 8.10 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Example 2 Consider a paging system with the page table stored in memory. (a) If a memory reference takes 200 nanoseconds, how long does a paged memory reference take? (b) If we add associative registers, and 75% of all page-table references are found in the associative registers, what is the effective memory reference time? (Assume that finding a page-table entry in the associative registers takes zero time, if the entry is there.) Solution: a) 400 nanoseconds. 200 ns to access the page table plus 200 ns to access the word in memory. b) 250 nanoseconds.

11. 8.11 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts with Java – 8 th Edition Two level page table