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HCS12 Technical Training Module 12- MSCAN, Slide 1 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product.

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Presentation on theme: "HCS12 Technical Training Module 12- MSCAN, Slide 1 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product."— Presentation transcript:

1 HCS12 Technical Training Module 12- MSCAN, Slide 1 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Controller Area Network

2 Internal Bus SCI 1 256K FLASEEPROM 12K SRAM ATD 1 HCS12 CPU BKP INT MMI CM BDM MEBI 4K BYTES EEPROM SIM msCAN 3 msCAN 2 msCAN 1 SCI 1 SPI 2 or PWM CH 4-7 BDLC or msCAN 0 msCAN 4 or IIC SPI 1 or PWM CH 0-3 SPI 0 ATD 0 PIM PLL PIT ECT 8 CHAN PWM 8 CHAN

3 HCS12 Technical Training Module 12- MSCAN, Slide 3 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Bus Features: Up to 5 msCAN Modules (msCAN) 3 Tx message buffers each Automatically Mapped 5 Background Rx Buffers Programmable I/O modes Maskable interrupts Programmable loop-back for self test operation Independent of the transmission medium (external transceiver is assumed) Open network architecture Multimaster concept High immunity to EMI Short latency time for high-priority messages Low power sleep mode, with programmable wake up on bus activity Note: msCAN 0 is multiplexed with BDLC msCAN 4 is multiplexed with IIC.

4 HCS12 Technical Training Module 12- MSCAN, Slide 4 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. CAN SPECIFICATION LATEST REVISION (version 2.0) DIVIDED INTO PARTS A & B - PART A CONSISTS OF THE PREVIOUS SPECIFICATION REVISION (1.2): - Standard 11-bit Identifier Field - No specification for message filtering - Layered architecture description based on Bosch's internal model - PART B OUTLINES ENHANCEMENTS TO THE CAN PROTOCOL, INCLUDING: - Extended 29-bit Identifier Field - Some message filtering requirements - Layer description based on ISO/OSI reference model MINIMUM CAN REQUIREMENTS INCLUDE COMPATIBILITY WITH SPECIFICATION VERSION 2.0, PART A MOST CURRENT INDUSTRIAL APPLICATIONS USE THE STANDARD (11-BIT) IDENTIFIER FORMAT

5 HCS12 Technical Training Module 12- MSCAN, Slide 5 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. CAN PROPERTIES Serial communications protocol developed by Bosch, initially for automotive multiplex wiring systems Message prioritization defined by the user Guaranteed minimum latency for highest priority messages Multi - master protocol utilizes non - destructive collision resolution to ensure the highest priority message is transmitted onto bus Flexible system configuration allows the user to create the network which best fits the application Error detection and error signaling features are built into the CAN protocol, along with automatic retransmission of corrupted messages Distinction between temporary errors and permanent node failures prevents faulty nodes from causing long-term disruptions of network traffic

6 HCS12 Technical Training Module 12- MSCAN, Slide 6 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN - Layered Architecture DATA LINK LAYER LOGICAL LINK CONTROL (LLC) SUB-LAYER - Acceptance Filtering - Overload Notification - Recovery Management MEDIUM ACCESS CONTROL (MAC) SUB-LAYER - Data Encapsulation/Decapsulation - Frame Coding (Bit Stuffing/Unstuffing) - Medium Access Management - Error Detection/Signaling - Acknowledgement - Serialization/Deserialization PHYSICAL LAYER - Bit Encoding/Decoding - Bit Timing - Synchronization

7 HCS12 Technical Training Module 12- MSCAN, Slide 7 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Message Buffer Organization msCAN Tx0 Tx1 Tx2 TxE1 CPU msCAN TxE0 TxE2 Priority TxBG TxFG RxBG Rx0 Rx1 Rx2 Receiver Transmitter RxBG - Receive Background Buffer RxFG - Receive Foreground Buffer TxBG - Transmit Background Buffer TxFG - Transmit Foreground Buffer Rx3 Rx4 CPU RxF RxFG Tx Buffer Pointer Note: All Tx Buffers map to same address

8 HCS12 Technical Training Module 12- MSCAN, Slide 8 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN12 Buffer Scheme msCAN Receive / Transmit Engine HCS12 Memory Mapped I/O or 8 x 8 bits Internal Priority Scheduling Tx Buffer 2 Priority Register Tx Buffer 1 Priority Register Tx Buffer 0 Priority Register Rx Buffer 2 x 32 bits Identifier Filtering or 4 x 16 bits * HCS12 FILTERING IS 2x THAT OF THE HC08 5X FIFO

9 HCS12 Technical Training Module 12- MSCAN, Slide 9 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Simple user interface to CPU Message filtering and buffering Protocol handling Physical layer interface CPU Interface CAN Transmit Receive Engine Message filtering + buffering Control + status Physical interface H/W Errors CAN bus Microcontroller Requirements of a CAN Controller TX R X CANH CANL

10 HCS12 Technical Training Module 12- MSCAN, Slide 10 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Message Buffer Structure ID[28:18] SRR IDE ID[17:15] ID[14:0] RTR DATA BYTE 0DATA BYTE 1 DATA BYTE 2 DATA BYTE 3 DATA BYTE 4DATA BYTE 5 DATA BYTE 6DATA BYTE 7 DLC[3:0] Tx Buffer Priority Reg. Time Stamp EXTENDED ID $00x0 $00x2 $00x4 $00x6 $00x8 $00xA $00xC $00xE CONTROL/STATUS ID_HIGH ID_LOW ID[10 :0] RTR IDE 0 0 0 Reserved $00x1 $00x3 STANDARD ID $00x1 $00x3 $00x5 $00x7 $00x9 $00xB $00xD $00xF $00x2 $00x4

11 HCS12 Technical Training Module 12- MSCAN, Slide 11 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Extended Format Frames FieldDescription Time StampContains a copy of the high byte of the free running timer captured at the beginning of the identifier field of the buffer frame on CAN bus. ID[28:18]/[17:15]Contains 14 MS Bits of Extended identifier. Substitute RemoteContains a fixed recessive bit, used only in extended format. It should Request (SRR)be set to ‘1’ for TX buffers. It will be stored as received in the RX buffers ID ExtendedShould be set to ‘1’ for extended formats, ‘0’ otherwise. (IDE) ID(14:0)Bits[14:0] of the extended identifier field. Remote Transmission Request (RTR)0 = Data frame,1 = Remote frame

12 HCS12 Technical Training Module 12- MSCAN, Slide 12 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Standard Format Frames FieldDescription Time Stamp The ID LOW word, which is not needed for standard format, is used in a standard format buffer to store the value of the free-running timer which is captured at the beginning of the identifier field of the frame on the CAN bus. ID(28:18) Contains bits (28:18) of the identifier, located in the ID HIGH word of the message buffer. The four least significant bits in this register (corresponding to the IDE bit and ID(17:15) for an extended identifier message) must all be written as logic zeros to ensure proper operation of the msCAN. RTR This bit is located in the ID HIGH word of the message buffer; 0 = data frame, 1 = remote frame. RTR/SRR Bit Treatment If the msCAN transmits this bit as a one and receives it as a zero, an “arbitration loss” is indicated. If the msCAN transmits this bit as a zero and is receives it as a one, a bit error is indicated. If the msCAN transmits a value and receives a matching response, a successful bit transmission is indicated.

13 HCS12 Technical Training Module 12- MSCAN, Slide 13 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Frame Types A Data Frame is used to transmit data onto the multiplex bus; this is the frame used most often in a CAN network A Remote Frame is used to request a data frame from another node on the multiplex bus An Error Frame will be transmitted by any node which detects an error, corrupting the frame being transmitted An Overload Frame is used by a node which desires an extra delay between data or remote frames to allow it time to prepare to transmit a frame

14 HCS12 Technical Training Module 12- MSCAN, Slide 14 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. DATA FRAME

15 HCS12 Technical Training Module 12- MSCAN, Slide 15 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. ARBITRATION FIELD 1 BIT 12 BITS FOR STANDARD ID 32 BITS FOR EXTENDED ID

16 HCS12 Technical Training Module 12- MSCAN, Slide 16 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. STANDARD Vs. EXTENDED I.D. FORMAT

17 HCS12 Technical Training Module 12- MSCAN, Slide 17 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. CONTROL FIELD

18 HCS12 Technical Training Module 12- MSCAN, Slide 18 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. CRC & ACKNOWLEDGEMENT FIELDS

19 HCS12 Technical Training Module 12- MSCAN, Slide 19 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. REMOTE FRAME

20 HCS12 Technical Training Module 12- MSCAN, Slide 20 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. ERROR FRAME

21 HCS12 Technical Training Module 12- MSCAN, Slide 21 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. OVERLOAD FRAME

22 HCS12 Technical Training Module 12- MSCAN, Slide 22 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. INTERFRAME SPACE

23 HCS12 Technical Training Module 12- MSCAN, Slide 23 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. MESSAGE ARBITRATION If multiple nodes transmit simultaneously, bit-wise non-destructive arbitration during the message identifier field resolves the conflict Identifier defines the priority of the message as well as the target address Node transmitting a recessive level but detecting a dominant level immediately halts transmission and becomes a receiver Remote frame is lower priority than data frame Any loss of arbitration after the arbitration field will be interpreted as an error, and an error frame will be transmitted

24 HCS12 Technical Training Module 12- MSCAN, Slide 24 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. ERROR DETECTION Multiple Error Detection Features: - 15-bit cyclical redundancy check (CRC) - Bit stuffing - Each node verifies message framing All global errors detected Up to 5 randomly distributed errors will be detected Corrupted messages are flagged by any nodes detecting the error Corrupted messages are automatically retransmitted Recovery time from error detection to start of message retransmission is a maximum of 29 bit times

25 HCS12 Technical Training Module 12- MSCAN, Slide 25 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. FAULT CONFINEMENT Separate error counters for transmit and receive errors Error counters incremented by 1 or 8, decremented by 1 3 possible bus states: - Error active - both error counts < 128 - Error passive - either transmit or receive error count > 127 - Bus off - transmit error count > 255 Once error-free bus traffic resumes, nodes can recover from error states

26 HCS12 Technical Training Module 12- MSCAN, Slide 26 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. ERROR SIGNALING Error Active Node - Transmits active error flag during error frame - Only waits for intermission period during inter-frame space Error Passive Node - Transmits passive error flag during error frame - Must wait for "suspend transmission" period as well as intermission during inter-frame space Bus Off Node - Output drivers switched off - Will not participate in bus traffic, only allowed to monitor bus - Bus off node will return to error active status following detection of 128 consecutive periods of 11 recessive bits

27 HCS12 Technical Training Module 12- MSCAN, Slide 27 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Bit Timing SYNC_SEG : The bit edge is expected to lie within this segment ; always 1 time quantum (CAN clock period) long. PROP_SEG : Allowance for physical delays. Programmable from 1 to 8 TQ long. PROP_SEG >= 2 x  (bus propagation delay + input comparator delay + output driver delay) PHASE_SEG (1, 2): Defines position of the Sample Point. May be adjusted to compensate for edge phase errors –PHASE_SEG1: Programmable from 1 to 8 time quanta long. –PHASE_SEG2: Is the greater of PHASE_SEG1 and the INFORMATION PROCESSING TIME. SAMPLE POINT: Bus value is taken as the value of the bit INFORMATION PROCESSING TIME: Less than or equal to 2 time quanta. BIT TIME : Bit Time = SYNC_SEG + PROP_SEG + PHASE_SEG1 + PHASE_SEG2 SYNC_SEGPROP_SEGPHASE_SEG1PHASE_SEG2 BIT TIME Sample PointTransmit Point

28 HCS12 Technical Training Module 12- MSCAN, Slide 28 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Bus Timing (1 of 2) Synchronization Jump Width Baud Rate Prescaler CANBTR0 - Bus Timing Register 0 Address Offset $0002

29 HCS12 Technical Training Module 12- MSCAN, Slide 29 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Bit Timing (2 of 2) SAMP: 1 or 3 samples per bit TSEG1 is determined by TSEG13...TSEG10 TSEG2 is determined by TSEG22...TSEG20 CANBTR1 - Bus Timing Register 1 Address Offset $0002

30 HCS12 Technical Training Module 12- MSCAN, Slide 30 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. SYNCHRONIZATION HARD SYNCHRONIZATION - Occurs when recessive to dominant edge occurs during bus idle - Internal bit time is started with Sync-Seg Resynchronization - Occurs on all other recessive to dominant edges (and optionally dominant to recessive edges) - Phase-Seg 1 is lengthened or Phase-Seg 2 is shortened depending upon phase error Phase Error - e - e = 0 If edge lies within Sync-Seg - e > 0 If edge lies after Sync-Seg - e < 0 If edge lies before Sync-Seg Resynchronization Jump Width - The maximum amount by which Phase-Seg 1 may be lengthened or Phase-Seg 2 may be shortened

31 HCS12 Technical Training Module 12- MSCAN, Slide 31 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Resynchronization (2) CAN Bus Receiver bit timing r d Negative Phase Error PHASE_SEG2 shortened Positive Phase Error PHASE_SEG1 lengthened Sample points S PS P1 P2 S PS P1 P2 S PS P1 P2 S PS P1 P2 S PS P1 P2

32 HCS12 Technical Training Module 12- MSCAN, Slide 32 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. CAN PHYSICAL LAYER REQUIREMENTS CAN Protocol does not specify physical layer No specified transceiver, user's network characteristics define transceiver requirements Acceptable physical media can include, though not limited to: - Twisted Pair, Shielded or Unshielded - Single Wire - Fiber Optic Cable - Transformer Coupled to power lines Acceptable transmission rates range from 5k to1m bit/sec Most implementations use NRZ bit formatting over twisted pair bus Three different automotive physical layers exist: ISO11898 Differential, ISOxxxx Fault-Tolerant, J2411 Single Wire

33 HCS12 Technical Training Module 12- MSCAN, Slide 33 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN MB Identifier Registers ID28ID27ID26ID25ID24ID23ID22ID21 ID20ID19ID18 RTR/SRR IDE ID17ID16ID15 ID14ID13ID12ID11ID10ID9ID8ID7 ID6ID5ID4ID3ID2ID1ID0RTR IDR0 IDR1 IDR2 IDR3 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Standard Identifier (IDE = 0) / Base Identifier (IDE = 1) Extended Identifier (SRR = 1) The priority of an Identifier is highest for the smallest binary value ie. logic ‘0’ is transmitted as dominant. The 7 most significant bits (ID28 - ID22) must not all be ‘1’ (recessive). Address Offset $00x0 $00x1 $00x2 $00x3

34 HCS12 Technical Training Module 12- MSCAN, Slide 34 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN MB Data Registers D7D6D5D4D3D2D1D0DR0..7 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 DLC3DLC2DLC1DLC0DLR P7 P6 P5 P4 P3P2 P1 P0 TBPR Priority Register for Transmit Buffers only. $00 is highest priority. Data Length Code should be 0..8 only.

35 HCS12 Technical Training Module 12- MSCAN, Slide 35 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Acceptance Registers (2x32 Bit Filter) CANIDAR0 CANIDAR1 CANIDAR2 CANIDAR3 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Standard Identifier / Base Identifier Extended Identifier Address Offset $0010 $0011 $0012 $0013 $0018 $0019 $001A $001B CANIDAR4 CANIDAR5 CANIDAR6 CANIDAR7 AC28 AC27AC26AC25AC24AC23AC22AC21 AC20 AC19AC18 RTR/SRR IDE AC17AC16AC15 AC14 AC13AC12AC11AC10AC9AC8AC7 AC6AC5AC4AC3AC2AC1AC0RTR AC28AC27AC26AC25AC24AC23AC22AC21 AC20AC19AC18 RTR/SRR IDE AC17AC16AC15 AC14 AC13AC12AC11AC10AC9AC8AC7 AC6AC5AC4AC3AC2AC1AC0RTR

36 HCS12 Technical Training Module 12- MSCAN, Slide 36 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Message Acceptance Mask AM28AM27AM26AM25AM24AM23AM22AM21 AM20AM19AM18 RTR/SRR IDEAM17AM16AM15 AM14AM13AM12AM11AM10AM9AM8AM7 AM6AM5AM4AM3AM2AM1AM0RTR CANIDMAR0 CANIDMAR1 CANIDMAR2 CANIDMAR3 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Standard Identifier / Base Identifier Extended Identifier Address Offset $0014 $0015 $0016 $0017 $001C $001D $001E $001F AM28AM27AM26AM25AM24AM23AM22AM21 AM20AM19AM18 RTR/SRR IDEAM17AM16AM15 AM14AM13AM12AM11AM10AM9AM8AM7 AM6AM5AM4AM3AM2AM1AM0RTR CANIDMAR4 CANIDMAR5 CANIDMAR6 CANIDMAR7

37 HCS12 Technical Training Module 12- MSCAN, Slide 37 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Message Acceptance Registers (4x16 bit filter) AM28AM27AM26AM25AM24AM23AM22AM21 AM20AM19AM18 RTR/SRR IDE AM17 AM16 AM15 CANIDMAR0 CANIDMAR1 CANIDMAR2 CANIDMAR3 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Standard Identifier / Base Identifier Extended Identifier AM28AM27AM26AM25AM24 AM23 AM22AM21 AM20AM19AM18 RTR/SRR IDEAM17AM16AM15 CANIDMAR4 CANIDMAR5 CANIDMAR6 CANIDMAR7 AM28AM27AM26AM25AM24AM23AM22AM21 AM28AM27AM26AM25AM24AM23AM22AM21 AM20AM19AM18 RTR/SRR IDEAM17AM16AM15 AM20AM19AM18 RTR/SRR IDEAM17AM16AM15 Address Offset $0010 $0011 $0012 $0013 $0018 $0019 $001A $001B

38 HCS12 Technical Training Module 12- MSCAN, Slide 38 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Acceptance Registers (8x8 Bit Filter) AM28AM27AM26AM25AM24AM23AM22AM21 AM28AM27AM26 AM25 AM24AM23AM22AM21 AM28AM27AM26AM25AM24AM23AM22AM21 AM28AM27 AM26 AM25 AM24 AM23AM22AM21 CANIDMAR0 CANIDMAR1 CANIDMAR2 CANIDMAR3 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Standard/Extended Identifier AM28AM27 AM26 AM25AM24AM23AM22AM21 AM28AM27AM26 AM25 AM24AM23AM22AM21 AM28AM27AM26AM25AM24AM23AM22AM21 AM28AM27AM26AM25AM24AM23AM22AM21 CANIDMAR4 CANIDMAR5 CANIDMAR6 CANIDMAR7 Address Offset $0010 $0011 $0012 $0013 $0018 $0019 $001A $001B

39 HCS12 Technical Training Module 12- MSCAN, Slide 39 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Acceptance Filter Each Acceptance Register has a corresponding Acceptance Mask Register. Any bit set in an Acceptance Mask Register means that bit in the Acceptance Register is masked, ie. not compared with the Message Identifier to determine acceptance. Only bits in the Acceptance Register which are not masked are compared with the message Identifier to determine acceptance. –16 bit filter. Bit 3 of CANIDAR1 is ‘1’ and bit 3 of CANIDMR1 is ‘0’ »Therefore IDE must be ‘1’ to be accepted ie Standard Format Identifier. »In this case CIDMR1 bits 2,1,0 must all be ‘1’ (mask). – As above, plus CANIDMR1 bit 4 is ‘1’ (mask). »Therefore Data Frames or Remote Frames accepted.

40 HCS12 Technical Training Module 12- MSCAN, Slide 40 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Acceptance Control Register IDAM1IDAM0IDHIT2IDHIT1IDHIT0 CANIIDAC bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 Identifier Acceptance Mode Settings Identifier Acceptance Hit Indication

41 HCS12 Technical Training Module 12- MSCAN, Slide 41 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Receive Process 1) Set SFTRST. 2) Configure Acceptance Filter. 3) Enable Receive interrupt. 4) Clear SFTRST. Receive Interrupt: 1) Read Identifier. 2) Read Data Field (if not Remote Frame). 3) Read Timer Stamp if enabled. 4) Release Receive buffer.

42 HCS12 Technical Training Module 12- MSCAN, Slide 42 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Transmit Control TXEn = 1: Transmit buffer empty (sent or aborted). TXEn = 0: Transmit buffer full (not sent, scheduled). TXEIEn = 1: Enable transmit interrupt. ABTRQn = 1: Request abort of transmission. ABTAKn = 1: Message aborted (not sent). ABTAKn = 0: Message not aborted (sent). ABTRQ1ABTRQ0 CANTARQ bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 ABTRQ2 ABTAK2ABTAK1 CANTAAK ABTAK0 $0008 Address Offset $0006 TXEIE2TXEIE1TXEIE0 CANTIER CANTFLG TXE2TXE1TXE0 $0007 $0009 Write “1” to Clear Interrupt Flag RST: 0…………………………………………………………0 1 1 1 RST: 0…………………………………………………………………………………...…………………0

43 HCS12 Technical Training Module 12- MSCAN, Slide 43 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Transmit Process 1) Write Identifier, Data and Priority to empty transmit buffer. 2) Schedule buffer for transmission (clear TXEn). 3) Enable Transmit interrupt (set TXEIEn). The transmit buffer with the lowest value (highest Priority) that is scheduled for transmission will arbitrate for CAN bus access during the next IFS. Transmit Interrupt: 1) Identify transmitted message buffer. 2) Disable Transmit interrupt. 3) Test ABTAK. 4) Read Time Stamp if enabled. 5) Load with new ID, data and schedule for transmission.

44 HCS12 Technical Training Module 12- MSCAN, Slide 44 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Interrupt Control WUPIF: Wakeup interrupt flag. CSCIF: CAN Status Change Interrupt Flag OVRIF: Overrun interrupt flag. RXF: (Foreground) Receive buffer full. CACRIER - Receiver Interrupt Enable Register CANRFLG - Receiver Flag Register RSTAT1–RSTAT0 — Receiver Status Bits The values of the Error Counters control the actual bus status of the MSCAN. As soon as the Status Change Interrupt Flag (CSCIF) is set these bits indicate the appropriate receiver related bus status of the MSCAN. 11 = Bus Off : 255 > Transmit Error Counter 10 = RxERR: 127 < Receive Error Counter 01 = RxWRN: 96 < Receive Error Counter < 127. 00 = RxOK: 0 < Receive Error Counter < 96. To clear the interrupt request Must write a “1” to clear corresponding bit, with the event that caused it to set is no longer valid TSTAT1–TSTAT0 — Transmitter Status Bits The values of the Error Counters control the actual bus status of the MSCAN. As soon as the Status Change Interrupt Flag (CSCIF) is set these bits indicate the appropriate transmitter related bus status of the MSCAN. 11 = Bus Off: 255 > Transmit Error Counter 10 = TxERR: 127 < Transmit Error Counter < 255 01 = TxWRN: 96 < Transmit Error Counter < 127 00 = TxOK: 0 < Transmit Error Counter < 96

45 HCS12 Technical Training Module 12- MSCAN, Slide 45 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Control Register 0 RXFRM - Receive Frame 1= Valid message was received 0 = No message was received RXACT - Receiver Active 1 = msCAN is currently receiving a message 0 = msCAN is transmitting or idle CSWAI - msCAN stops in WAIT mode 1 = msCAN clock is stopped during Wait mode 0 = msCAN continues to run in Wait mode SYNCH - Synchronized Status 1 = msCAN is synchronized to CAN bus 0 = msCAN is not synchronized RXFRM CSWAISYNCH WUPE SLPRQ INITRQ RXACT CANCTL0 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 TIME Address Offset $0000 TIME - Timer Enable 1 = Internal timer enabled 0 = Internal timer is disabled WUPE - Wake-up Enable 1 = msCAN is able to start from sleep mode 0 = msCAN will not wake up from sleep mode and ignores bus traffic SLPRQ: SLEEP Mode Request. 1 = Put the msCAN to sleep 0 = msCAN functions normally INITRQ - Initialization Mode Request 1 = msCAN is in initialization mode 0 = Normal operation

46 HCS12 Technical Training Module 12- MSCAN, Slide 46 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Control Register 1 CANE - msCAN Enable 1 = msCAN is enabled 0 = msCAN is disabled CLKSRC - msCAN Clock Source 1 = The msCAN clock source from IP bus clock 0 = The msCAN clock source from the OSC-CLK LOOPB: Internal loopback self test mode. 1 = Enable loop back mode 0 = Disable loop back mode LISTEN - Listen only Mode 1 = Listen only mode is active 0 = Normal operation CANECLKSRC0 CANCTL1 bit 7bit 6bit 5bit4bit 3bit 2bit 1bit 0 LOOPB LISTEN WUPMSLPAKINITAK Address Offset $0001 WUMP - Wake-up Mode 1 = msCAN wakes up the CPU upon detection of a dominant pulse that has a length of Twup while WUPE=1 0 = msCAN wakes the CPU on recessive to dominant edge on the CAN bus while WUPE =1 SLPAK - Sleep Mode Acknowledge 1 = The msCAN entered sleep mode 0 = msCAN is running INITAK - Initialization Mode Acknowledge 1 = Initialization mode is active 0 = Normal operation

47 HCS12 Technical Training Module 12- MSCAN, Slide 47 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Low Power Modes msCAN registers may still be accessed in SLEEP and Soft Reset modes. msCAN will generate a Wakeup interrupt only if SLPAK = 1 and WUPIE = 1 The message which wakes up the msCAN will not be received.

48 HCS12 Technical Training Module 12- MSCAN, Slide 48 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. msCAN Error Counter Rx & Tx Error Counters are Read Only when in sleep mode (SLPRQ = 1 & SLPAK =1) or in Initialization mode (INITRQ & INITAK) Tx Error Counter Rx Error Counter Address Offset $000E $000F

49 HCS12 Technical Training Module 12- MSCAN, Slide 49 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Window Lift Lock Mirror Lock Mirror Lock Universal Motor Universal Panel Wiper Interior Light Lock Seat Roof ECU 3 ECU 1 ECU 2 OSEK OS OSEK COM/NM e.g. ignition Gateway Application Light OSEK OS Task E Task F Task D Climate Control OSEK COM/NM OSEK OS Task B Task C Task A Central Body Control OSEK COM/NM Instrument s ECU 4 CAN Engine Network (> 250kbps) CAN Body Network (< =125kbps) Sub Bus Network (< 50kbps) Motorola’s System Focus Development Tools Drivers Motorola Silicon OSEK-OS, -COM, -NM Functionality OS Libraries Application Code Design Tools Motorola Focus Heating

50 HCS12 Technical Training Module 12- MSCAN, Slide 50 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Example of CAN in a Door System

51 HCS12 Technical Training Module 12- MSCAN, Slide 51 MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001. Example of CAN in ISU / Gateway Application INPUT CIRCUITRY MC33287 MC9S12DP256 SPI Serial relay drivers Lamps / Motors Flasher MC33288 M M (MC33298) L M LL L Courtesy lamps MC33286 PWM I/O's SCI MC33388 R R MC7805 DIAGNOSTIC CAN 256K FLASH 12K RAM 20 - 30 INPUTS Front/Rear Wiper Drivers MC33HBRIDGE M M ISU SYSTEM Central locking driver MC33HBRIDGE BODY CAN BUS CAN MC33388 POWERTRAIN CAN BUS CAN H CAN L CAN H Vbat 5V


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