1. COE4OI5 Engineering Design

2. Copyright S. Shirani 2 Course Outline Design process, design of digital hardware Programmable logic technology Altera’s UP2 and UP3 boards Nios II soft core processor and system on a programmable chip Using VHDL for synthesis of digital hardware (including macrofunctions and primitives) UP3core library functions (VGA, mouse, keyboard interfaces) Design examples

3. Copyright S. Shirani 3 Project Students are supposed to complete a project in groups of two Every group can choose the subject of their project A typical project should involve the design of a digital system (e.g., FIR filter, a robot control system) The design should be entered into CAD tool (e.g., Quartus) using VHDL and be simulated to make sure it meets the specified requirements A hardware implementation of the project using the UP2 or UP3 boards available in the lab is required.

4. Copyright S. Shirani 4 Students’ responsibilities for the project Get a pass-card for the lab Form groups Choose a project Actively engage in work on the project Prepare a project proposal Prepare a progress report Prepare a final report

5. Copyright S. Shirani 5 Lab location, time and facilities Lab: ITB-155 Lab hours: Monday, Tuesday, Wednesday, Thursday, Friday 2:30 to 5:30 Student can use the lab facility for their projects at additional time: Monday-Thursday 7:30 AM- 11:00 PM, Friday 7:30 AM-9:00 PM, Saturday and Sunday 10:00 AM-10:00 PM The door to the lab has a card sweep lock This is the only course using the ITB-155

6. Copyright S. Shirani 6 Suggestions and requests Start working on the project as soon as possible Partition your project into modules and implement and test each module separately Do not take the UP3 boards out of the lab A limited number of UP2 boards are available for students to sign out (if their project require e.g., for a robot project). These boards will be handed on a first come first serve basis. Do not play with equipment not related to this course which is in the lab Do not drink or eat in the lab Do not login on a computer and leave it idle The lab has video surveillance

7. Copyright S. Shirani 7 CD -ROM Contains the Quartus software from Altera. Contains the UP2 and UP3 manuals (in booksoft/chap2) Contains the UP3core library functions (in booksoft/chap5 directory)

8. Copyright S. Shirani 8 Definition of Engineering Design The process of devising a system, component, or process to meet desired needs

9. Copyright S. Shirani 9 Required product Design specifications Initial design Simulation Design correct? Redesign Prototype implementation Testing Meets specifications? Finished product Minor errors? Make corrections No Yes No Yes No The development process

10. Copyright S. Shirani 10 Design Process Define specifications: essential features of the product are identified. –Specifications must be tight enough to ensure that the developed product will meet the general expectations, but not be unnecessarily constraining. Initial design: is generated from the design specifications –This step is usually performed by a human designer. –It requires considerable design experience and intuition.

11. Copyright S. Shirani 11 Design Process Simulation: CAD tools are used to simulate the behavior of the initial design to determine whether the obtained design meets the required specifications. If errors are found appropriate changes are made and verification is repeated through simulation. Usually all except subtle problems are discovered in this way. When simulation indicated that the design is correct, a prototype of the product is constructed.

12. Copyright S. Shirani 12 Design Process The prototype is thoroughly tested for conformance with the specifications. Minor errors are often eliminated by making small corrections directly on the prototype. In the case of large errors, it is necessary to redesign the product.

13. Copyright S. Shirani 13 Design of digital hardware

14. Copyright S. Shirani 14 Design interconnection between blocks Functional simulation of complete system Correct? Physical mapping Timing simulation Correct? Implementation No Yes No Yes Design one block Partition Design concept A B C D Figure 1.6 Design flow for logic circuits

15. Copyright S. Shirani 15 Development of a complex digital hardware Implementation Finished Build prototype Testing Correct? Modify prototype No Yes Minor errors? Yes Go to A, B, C, or D No

16. Copyright S. Shirani 16 Design of digital hardware A common way of dealing with complexity in digital hardware is to partition the circuit into smaller blocks and design each block separately. Having successfully designed all blocks, the interconnection between blocks must be defined. The complete circuit is simulated and errors are corrected Errors caused by incorrect connections: connections are redefined (path C) Some blocks have not been designed correctly: erroneous blocks are redesigned (path B) Some functionality missing: incorrect partitioning (path A)

17. Copyright S. Shirani 17 Design of digital hardware Physical mapping: physical location of each chip on the board and wiring pattern –CAD tools are relied on Does the physical layout affect the performance of the circuit (even though the functional behavior of complete system is correct)? Physical wiring introduce resistance and capacitance. It may have an impact on the speed of operation. Timing simulation is used to check the performance of the circuit after wiring.

18. Copyright S. Shirani 18 Design of digital hardware Having completed timing simulation a prototype of the circuit is implemented. The prototype is tested. Minor errors are corrected on the prototype. Large problems require a redesign.

19. Copyright S. Shirani 19 CAD tools A CAD system has tools for performing the following tasks: –Design entry –Initial synthesis –Functional simulation –Logic synthesis and optimization –Physical design –Timing simulation –Chip configuration

20. Copyright S. Shirani 20 Design conception Truth table VHDLSchematic capture Simple synthesis Translation Merge Boolean equations INITIAL SYNTHESIS TOOLS DESIGN ENTRY Design correct? Logic synthesis, physical design, timing simulation Functional simulation No Yes The first stages of a CAD system

21. Copyright S. Shirani 21 A complete CAD system Design conception Design correct? Chip configuration Timing simulation No Yes Design entry, initial synthesis, and functional simulation Physical design Logic synthesis/optimization

22. Copyright S. Shirani 22 CAD tools The starting point in the process of designing a digital circuit is the conception of what the circuit is supposed to do and the formulation of its general structure. This step is done manually. The rest is done by CAD tools.

23. Copyright S. Shirani 23 CAD tools Design entry: a description of the circuit being designed should be entered into CAD system Different ways of doing this: –Truth tables –Schematic capture –Hardware description languages Initial synthesis: produces a network of logic gates

24. Copyright S. Shirani 24 CAD tools Functional simulation: is used to verify the functionality of the circuit based on input provided by the designer This simulation is performed before any optimization and propagation delays are ignored. Goal: validate the basic operations of the circuit

25. Copyright S. Shirani 25 CAD tools Logic synthesis and optimization: produces an equivalent but better circuit The measure of what makes one circuit better depends on the needs of a design project and the technology chosen for implementation

26. Copyright S. Shirani 26 CAD tools Physical design (layout synthesis): how to implement the circuit in the target technology This step consists of placement and routing Placement: where in the target device each logic function in the optimized circuit will be realized Routing: which wires in the chip are to be used to realize the required interconnections

27. Copyright S. Shirani 27 CAD tools Timing simulation: determines the propagation delays that are expected in the implemented circuit Timing simulation: ensures that the implemented circuit meets the required performance Some of timing errors can be corrected by using the synthesis tool If the logic synthesis tool cannot resolve the timing problem, it is necessary to return to the beginning of the design flow to consider other alternatives Final step: configure the target chip to implement the circuit

28. Copyright S. Shirani 28 Summary Design and development process Design of digital hardware CAD tools

29. Copyright S. Shirani 29 Design concept Successful design Initial design Simulation Design correct? Redesign No Yes The basic design loop