1. Leakage Power Minimization in Ultra-wideband (UWB) Communications Circuits
Edgar Wangolo

2. Presentation Plan UWB: concept and applications
Leakage power in sub-micron CMOS
Leakage minimization techniques
Application to PLL’s Prescaler
Project time table
References

3. UWB - Concept
FCC: bandwidth is more than 25% of a center frequency or more than 1.5 GHz
Typically implemented in a carrierless fashion
Directly modulate an “impulse” with a very sharp rise and fall time => a waveform that occupies several GHz
Historically started with radar applications for military use

4. UWB Vs. Narrowband Communications
Impulse
Modulation 3 10
GHz
frequency
Ultrawideband
Communication
Time-domain behavior
Frequency-domain behavior
time 1
(FCC Min=500Mhz)
Frequency
Modulation
2.4
GHz
Narrowband
Communication 1

5. Transmit Power Spectral Density
Operation Principles (“Spectrum Underlay“)
Narrowband (e.g GSM: +35 dBm/MHz)
Transmit Power Spectral Density
[dBm/MHz]
WCDMA (typ. +15 dBm/MHz)
UWB (e.g – 41 dBm/MHz)
Frequency/GHz
Bandwidth (GSM : WCDMA : UWB) ~ 1 : 10 : 10000 4

6. UWB Spectrum FCC ruling permits UWB spectrum overlay UWB Spectrum
Bluetooth,
802.11b
Cordless Phones
Microwave Ovens
GPS
802.11a
Emitted
Signal
Power
PCS
“Part 15 Limit”
-41 dBm/Mhz
UWB
Spectrum
1.6
1.9
2.4
3.1 5
10.6
Frequency (Ghz)

7. UWB Vs. Narrowband UWB Transceiver Narrowband Transceiver DIGITAL CLK
GAIN
ADC
CLK
DIGITAL TX
D/A I Q
MIXER
LNA PA
A/D
DIGITAL:
F SYNTH
ANALOG:
Narrowband
Transceiver

8. UWB: Advantages High Bandwidth, high data rate
Low power spectral densities
Simple, low cost
Immunity to interference
Challenges:
Low/Medium Range
Signal to noise ratio is still an issue

9. UWB: Applications Accurate positioning (through wall radar, tracking)
High quality wireless video
Satellite communications
Air traffic control
Medical imaging
Etc.

10. PLL Block Diagram PFD Loop Filter VCO input output %N
30 – 40% of total power
PFD up
Charge
Pump
Loop
Filter
VCO
input
output
down %N
40% of total power
Today’s monolithic PLL’s use Phase Frequency Detectors
(PFD), charge pumps, and an optional frequency divider
in the feedback path.

11. N-digit Fractional-N Prescaler
Fout
Fin
2/3
2/3
2/3
2/3 Pn P1 P2 P0
N=2n+2n-1Pn-1+2n-2Pn-2+…+2P1+P0

12. Circuit Power
Dynamic Power: determined by circuit performance requirement.
Short_Circuit Power: Both PU and PD circuit partially conduct. Small percentage. (<10%)
Leakage Power: Increasingly important, and many issues dependent, such as device geometry, temperature, doping, processing and data pattern dependent, etc. It is very complicated and worthy to study more to improve it.

13. Leakage Power Sources
Sub-threshold
Gate oxide PN

14. Leakage control: MTCMOS

15. Smart Switch Series (Triple-S)

16. RCSFF: Reduced-Clock Swing Flip-Flop

17. Timetable Literatures: March 10 Circuit Design: March 16
Simulations: March 28
Presentation: April 6
Report: April 20

18. References
Hiroshi Kawagushi and Takayasu Sakurai, “A Reduced Clock-Swing Flip-Flop (RCSFF) for 63% Power reduction”, IEEE Journal of Solid State Circuits, Vol. 33, N05, May 1998
Tschanz et. Al, “Dynamic Sleep Transistor and body bias for active leakage power control of microprocessor”, IJSSC, Nov 2003
J. T. Kao and A. Chandrakasan, “ Dual Threshold Voltage Techniques for Low-Power Digital Circuits”, IEEE Journal of Solid-State Circuits, July 2000