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© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

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Presentation on theme: "© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic."— Presentation transcript:

1 © Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic July 30, 2002

2 © Digital Integrated Circuits 2nd Devices Goal of this chapter  Present intuitive understanding of device operation  Introduction of basic device equations  Introduction of models for manual analysis  Introduction of models for SPICE simulation  Analysis of secondary and deep-sub-micron effects  Future trends

3 © Digital Integrated Circuits 2nd Devices The Diode Mostly occurring as parasitic element in Digital ICs

4 © Digital Integrated Circuits 2nd Devices Depletion Region

5 © Digital Integrated Circuits 2nd Devices Depletion Region

6 © Digital Integrated Circuits 2nd Devices Depletion Region

7 © Digital Integrated Circuits 2nd Devices Forward Bias Typically avoided in Digital ICs Wp Wn

8 © Digital Integrated Circuits 2nd Devices Forward Bias

9 © Digital Integrated Circuits 2nd Devices Forward Bias

10 © Digital Integrated Circuits 2nd Devices Reverse Bias The Dominant Operation Mode

11 © Digital Integrated Circuits 2nd Devices Diode Current

12 © Digital Integrated Circuits 2nd Devices Models for Manual Analysis

13 © Digital Integrated Circuits 2nd Devices Junction Capacitance

14 © Digital Integrated Circuits 2nd Devices Diffusion Capacitance

15 © Digital Integrated Circuits 2nd Devices Secondary Effects –25.0–15.0–5.05.0 V D (V) –0.1 I D ( A ) 0.1 0 0 Avalanche Breakdown

16 © Digital Integrated Circuits 2nd Devices Diode Model

17 © Digital Integrated Circuits 2nd Devices SPICE Parameters

18 © Digital Integrated Circuits 2nd Devices What is a Transistor? A Switch! |V GS | An MOS Transistor

19 © Digital Integrated Circuits 2nd Devices The MOS Transistor Polysilicon Aluminum

20 © Digital Integrated Circuits 2nd Devices MOS Transistors - Types and Symbols D S G D S G G S DD S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact

21 © Digital Integrated Circuits 2nd Devices Basic Concepts

22 © Digital Integrated Circuits 2nd Devices Depletion of MOS

23 © Digital Integrated Circuits 2nd Devices Creating Inversion Layer

24 © Digital Integrated Circuits 2nd Devices Ideal Threshold Voltage

25 © Digital Integrated Circuits 2nd Devices More Realistic Vto

26 © Digital Integrated Circuits 2nd Devices Even More Realistic Vto  Threshold adjustment with ion dose Di

27 © Digital Integrated Circuits 2nd Devices Body Effect

28 © Digital Integrated Circuits 2nd Devices MOSFET Operation

29 © Digital Integrated Circuits 2nd Devices MOSFET GCA Analysis

30 © Digital Integrated Circuits 2nd Devices MOSFET GCA Analysis

31 © Digital Integrated Circuits 2nd Devices MOSFET GCA Analysis

32 © Digital Integrated Circuits 2nd Devices Non saturation mode

33 © Digital Integrated Circuits 2nd Devices Saturation Mode  Find the maximum in Id equation

34 © Digital Integrated Circuits 2nd Devices Saturation Mode

35 © Digital Integrated Circuits 2nd Devices Channel Length Modulation

36 © Digital Integrated Circuits 2nd Devices Saturation Mode (Channel Length Modulation)

37 © Digital Integrated Circuits 2nd Devices The Threshold Voltage

38 © Digital Integrated Circuits 2nd Devices The Body Effect

39 © Digital Integrated Circuits 2nd Devices Body Bias

40 © Digital Integrated Circuits 2nd Devices Current-Voltage Relations A good ol’ transistor Quadratic Relationship 00.511.522.5 0 1 2 3 4 5 6 x 10 -4 V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V ResistiveSaturation V DS = V GS - V T

41 © Digital Integrated Circuits 2nd Devices Current-Voltage Relations Long-Channel Device

42 © Digital Integrated Circuits 2nd Devices A model for manual analysis

43 © Digital Integrated Circuits 2nd Devices Current-Voltage Relations The Deep-Submicron Era Linear Relationship -4 V DS (V) 00.511.522.5 0 0.5 1 1.5 2 2.5 x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V Early Saturation

44 © Digital Integrated Circuits 2nd Devices Velocity Saturation  (V/µm)  c = 1.5  n ( m / s )  sat = 10 5 Constant mobility (slope = µ) Constant velocity

45 © Digital Integrated Circuits 2nd Devices Perspective I D Long-channel device Short-channel device V DS V DSAT V GS - V T V GS = V DD

46 © Digital Integrated Circuits 2nd Devices I D versus V GS 00.511.522.5 0 1 2 3 4 5 6 x 10 -4 V GS (V) I D (A) 00.511.522.5 0 0.5 1 1.5 2 2.5 x 10 -4 V GS (V) I D (A) quadratic linear Long Channel Short Channel

47 © Digital Integrated Circuits 2nd Devices I D versus V DS -4 V DS (V) 00.511.522.5 0 0.5 1 1.5 2 2.5 x 10 I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V 00.511.522.5 0 1 2 3 4 5 6 x 10 -4 V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V ResistiveSaturation V DS = V GS - V T Long ChannelShort Channel

48 © Digital Integrated Circuits 2nd Devices Simple Model versus SPICE V DS (V) I D (A) Velocity Saturated Linear Saturated V DSAT =V GT V DS =V DSAT V DS =V GT

49 © Digital Integrated Circuits 2nd Devices A PMOS Transistor -2.5-2-1.5-0.50 -0.8 -0.6 -0.4 -0.2 0 x 10 -4 V DS (V) I D (A) Assume all variables Negative relative to Vdd! VGS = -1.0V VGS = -1.5V VGS = -2.0V VGS = -2.5V

50 © Digital Integrated Circuits 2nd Devices Transistor Model for Manual Analysis

51 © Digital Integrated Circuits 2nd Devices MOS Capacitances Dynamic Behavior

52 © Digital Integrated Circuits 2nd Devices Dynamic Behavior of MOS Transistor

53 © Digital Integrated Circuits 2nd Devices The Gate Capacitance t ox n + n + Cross section L Gate oxide x d x d L d Polysilicon gate Top view Gate-bulk overlap Source n + Drain n + W SPICE Parameter: CGSO, CGDO = Xd*Cox

54 © Digital Integrated Circuits 2nd Devices Gate Capacitance Cut-off ResistiveSaturation Most important regions in digital design: saturation and cut-off For speed considerations, assume worst-case scenario = W*L*Cox

55 © Digital Integrated Circuits 2nd Devices Gate Capacitance Capacitance as a function of VGS (with VDS = 0) Capacitance as a function of the degree of saturation

56 © Digital Integrated Circuits 2nd Devices Measuring the Gate Cap -1.5 -1 -0.50 3 4 5 6 7 8 9 10 x 10 -16 2 V GS (V) V GS Gate Capacitance (F) 0.511.52 -2 I

57 © Digital Integrated Circuits 2nd Devices Diffusion Capacitance Bottom Side wall Channel Source N D Channel-stop implant N A + SubstrateN A W x j L S

58 © Digital Integrated Circuits 2nd Devices Junction Capacitance

59 © Digital Integrated Circuits 2nd Devices Capacitances in 0.25  m CMOS process

60 © Digital Integrated Circuits 2nd Devices Capacitances in 0.5  m CMOS process NMOSFETPMOSFET K19.6 uA/V 2 5.4 uA/V 2 VTO0.74 V-0.74 V g0.6 l0.06 V -1 0.19 V -1 Xd (Under Diffusion)6 nm1 nm NSUB1.3 x 10^(16) cm -3 4.8 x 10^(15) cm -3 COX1.1 x 10^(-3) F/m CGDO = CGSO9.6 x 10^(-12) F/m1.7 x 10^(-12) F/m CJ2.8 x 10^(-4) F/m 2 3.0 x 10^(-4) F/m 2 CJSW1.7 x 10^(-10) F/m2.6 x 10^(-10) F/m

61 © Digital Integrated Circuits 2nd Devices The Sub-Micron MOS Transistor  Threshold Variations  Subthreshold Conduction  Parasitic Resistances

62 © Digital Integrated Circuits 2nd Devices Threshold Variations V T L Long-channel threshold LowV DS threshold Threshold as a function of the length (for lowV DS ) Drain-induced barrier lowering (for lowL) V DS V T

63 © Digital Integrated Circuits 2nd Devices Sub-Threshold Conduction 00.511.522.5 10 -12 10 -10 10 -8 10 -6 10 -4 10 -2 V GS (V) I D (A) VTVT Linear Exponential Quadratic Typical values for S: 60.. 100 mV/decade The Slope Factor S is DV GS for I D2 /I D1 =10

64 © Digital Integrated Circuits 2nd Devices Sub-Threshold I D vs V GS V DS from 0 to 0.5V

65 © Digital Integrated Circuits 2nd Devices Sub-Threshold I D vs V DS V GS from 0 to 0.3V

66 © Digital Integrated Circuits 2nd Devices Summary of MOSFET Operating Regions  Strong Inversion V GS > V T  Linear (Resistive) V DS < V DSAT  Saturated (Constant Current) V DS  V DSAT  Weak Inversion (Sub-Threshold) V GS  V T  Exponential in V GS with linear V DS dependence

67 © Digital Integrated Circuits 2nd Devices Parasitic Resistances

68 © Digital Integrated Circuits 2nd Devices Latch-up

69 © Digital Integrated Circuits 2nd Devices Future Perspectives 25 nm FINFET MOS transistor

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