1. Jan M. Rabaey The Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction

2. Goal of this chapter Digital Integrated Circuits© Prentice Hall 1995 Introduction

3. The Diode n p p n BA SiO 2 Al A B A B Cross-section of pn-junction in an IC process One-dimensional representationdiode symbol Digital Integrated Circuits© Prentice Hall 1995 Introduction

4. Depletion Region Digital Integrated Circuits© Prentice Hall 1995 Introduction

5. Diode Current Digital Integrated Circuits© Prentice Hall 1995 Introduction

6. Models for Manual Analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction

7. Junction Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction

8. Diode Switching Time Digital Integrated Circuits© Prentice Hall 1995 Introduction

9. Secondary Effects Digital Integrated Circuits© Prentice Hall 1995 Introduction

10. Diode Model Digital Integrated Circuits© Prentice Hall 1995 Introduction

11. SPICE Parameters Digital Integrated Circuits© Prentice Hall 1995 Introduction

12. The MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction

13. Cross-Section of CMOS Technology Digital Integrated Circuits© Prentice Hall 1995 Introduction

14. MOS transistors Types and Symbols D S G D S G G S DD S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact Digital Integrated Circuits© Prentice Hall 1995 Introduction

15. Transistor: No Voltages Digital Integrated Circuits© Prentice Hall 1995 Introduction

16. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transistor “Off” V gs <V t V gd V gs I ds V ds I=V/R No Channel exists: Enhancement mode transistor R V ds does not matter I ds

17. Threshold Voltage: Concept Digital Integrated Circuits© Prentice Hall 1995 Introduction

18. The Threshold Voltage Digital Integrated Circuits© Prentice Hall 1995 Introduction GND Out ? A B Body Effect

19. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Channel Formation V gs >V t V gd V gs I ds V ds I=V/R Positive Charge on Gate: Channel exists, but no current since V ds = 0 R I ds

20. Current-Voltage Relations Digital Integrated Circuits© Prentice Hall 1995 Introduction

21. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Linear Region V gs >V t & V gd >V t Positive Charge on Gate: Channel exists, Current Flows since V ds > 0 I ds = k’(W/L)((V gs -V t )V ds -V ds 2 /2) R V gd V gs I ds V ds I=V/R R= 1/(k’(W/L)(V gs -V t )) I ds

22. Transistor in Saturation Digital Integrated Circuits© Prentice Hall 1995 Introduction

23. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Saturation: V gs >V t & V gd <V t Positive Charge on Gate: Channel exists, Current Flows since V ds > 0 But: channel is “pinched off” I ds = (k’/2)(W/L)(V gs -V t ) 2 V gd V gs I ds “constant current source” I ds V ds V gs I ds

24. Current-Voltage Relations Digital Integrated Circuits© Prentice Hall 1995 Introduction

25. I-V Relation Digital Integrated Circuits© Prentice Hall 1995 Introduction

26. A model for manual analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction

27. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Saturation Effects Which is the resistor? Discharge of 1pf capacitor, with Vgs of 3,4,5 volts. Also, 12k resistor.

28. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Regions of Operation Summary

29. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Computed Curves Vgs = 5v Vgs = 4.5v Vgs = 4.0v Linear Resistor

30. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Spice Curves Vgs = 5v Vgs = 4v Vgs = 3v Vgs = 2v Vgs = 1v

31. Fitting level-1 model for manual analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction

32. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Retrofitted Level 1 Parameters 1.2um CMOS l NMOS »V TO = 0.743 V »K’ = 19.6  A/V 2 (20 vs 80)  = 0.06 V -1 l PMOS »V TO = -0.739 V »K’ = 5.4  A/V 2 (5 vs 27)  = 0.19 V -1

33. Dynamic Behavior of MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction

34. The Gate Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction

35. Average Gate Capacitance Most important regions in digital design: saturation and cut-off Different distributions of gate capacitance for varying operating conditions Digital Integrated Circuits© Prentice Hall 1995 Introduction

36. Diffusion Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction

37. The Sub-Micron MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction

38. Parasitic Resistances Digital Integrated Circuits© Prentice Hall 1995 Introduction

39. Velocity Saturation (2) Digital Integrated Circuits© Prentice Hall 1995 Introduction

40. Sub-Threshold Conduction Digital Integrated Circuits© Prentice Hall 1995 Introduction

41. Latchup Digital Integrated Circuits© Prentice Hall 1995 Introduction

42. SPICE MODELS Digital Integrated Circuits© Prentice Hall 1995 Introduction

43. MAIN MOS SPICE PARAMETERS Digital Integrated Circuits© Prentice Hall 1995 Introduction

44. SPICE Parameters for Parasitics Digital Integrated Circuits© Prentice Hall 1995 Introduction

45. SPICE Transistors Parameters Digital Integrated Circuits© Prentice Hall 1995 Introduction

46. Technology Evolution Digital Integrated Circuits© Prentice Hall 1995 Introduction

47. Spice Parameters for Parasitics Digital Integrated Circuits© Prentice Hall 1995 Introduction

48. Process Variations Digital Integrated Circuits© Prentice Hall 1995 Introduction

49. Impact of Device Variations Digital Integrated Circuits© Prentice Hall 1995 Introduction