1. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 CHAPTER 2 WEEK 7 CHAPTER 2 MOSFETS I-V CHARACTERISTICS CHAPTER 2

2. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 2.1INTRODUCTION

3. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Source and a drain highly conducting n-type semiconductor regions are isolated from the p-type substrate by reversed-biased p-n diodes. Gate metal or poly-crystalline covers the region between source and drain. separated from the semiconductor by the gate oxide. Fig. 2.1.1 Cross-section and circuit symbol of an n-type Metal-Oxide- Semiconductor-Field-Effect-Transistor (MOSFET)

4. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 MOSFETS (n/p type) Enhancement Mode No conducting channel unless a positive/negative voltage is applied Depletion Mode Have a conducting channel even when no gate voltage is applied The current gain capability is easily explained by the fact that no gate current is required to maintain the inversion layer and the resulting current between drain and source. Has therefore an infinite current gain in dc. The voltage gain of the MOSFET is caused by the current saturation at higher drain-source voltages, so that a small drain-current variation can cause a large drain voltage variation.

5. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 2.2 STRUCTURE AND PRINCIPLE OF OPERATION

6. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Fig. 2.2.1 Top view of an n-type Metal-Oxide-Semiconductor- Field-Effect- Transistor (MOSFET) gate length, L, and gate width, W. gate length does not equal the physical dimension of the gate, but rather the distance between the source and drain regions underneath the gate The overlap between the gate and the source/drain region is required to ensure that the inversion layer forms a continuous conducting path between the source and drain region. Typically this overlap is made as small as possible in order to minimize its capacitance.

7. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 The voltage applied to the gate controls the flow of electrons from the source to the drain. A positive voltage applied to the gate attracts electrons to the interface between the gate dielectric and the semiconductor. These electrons form a conducting channel called the inversion layer. No gate current is required to maintain the inversion layer at the interface since the gate oxide blocks any carrier flow. The net result is that the applied gate voltage controls the current between drain and source. The typical current versus voltage (I-V) characteristics of a MOSFET are shown in Figure 2.2.2.

8. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 5V 4V 3V 2V

9. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 2.3 MOSFET ANALYSIS

10. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 MOSFETs Models LinearQuadratic Variable Depletion Layer correctly predicts the MOSFET behavior for small drain-source voltages, where the MOSFET acts as a variable resistor acting as a linear device. MOSFET can be used as a switch for analog and digital signals or as an analog multiplier voltage variation along the channel between source and drain. most commonly used despite the fact that the variation of the depletion layer charge is ignored more complex. variation of the depletion layer along the channel.

11. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model The general expression for the drain current equals the total charge in the inversion layer divided by the time the carriers need to flow from the source to the drain: (2.3.1) Q inv the inversion layer charge per unit area W gate width L gate length t r transit time. If the velocity of the carriers is constant between source and drain, the transit time equals: (2.3.2)

12. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model

13. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model where the velocity, v, equals the product of the mobility and the electric field: (2.3.3) The constant velocity also implies a constant electric field so that the field equals the drain-source voltage divided by the gate length. This leads to the following expression for the drain current: (2.3.4)

14. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model Assume: charge density in the inversion layer is constant between source and drain. charge density in the inversion layer equals minus the product of the capacitance per unit area and the gate-to-source voltage minus the threshold voltage: (2.3.5) The inversion layer charge is zero if the gate voltage is lower than the threshold voltage. Replacing the inversion layer charge density in the expression for the drain current yields the linear model:

15. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model (2.3.6) In the above equations: the capacitance is the gate oxide capacitance per unit area. the drain current is zero if the gate-to-source voltage is less than the threshold voltage. The linear model is only valid if the drain-to-source voltage is much smaller than the gate-to-source voltage minus the threshold voltage. This insures that the velocity, the electric field and the inversion layer charge density is indeed constant between the source and the drain.

16. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Linear Model Fig. 2.3.1 Linear I-V characteristics of a MOSFET with V T = 1 V. (  n = 300 cm 2 /V-s, W/L = 5 and t ox = 20 nm). While there is no drain current if the gate voltage is less than the threshold voltage, the current increases with gate voltage once it is larger than the threshold voltage. The slope of the curves equals the conductance of the device, which increases linearly with the applied gate voltage. The figure therefore illustrates the use of a MOSFET as a voltage-controlled resistor.

17. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Quadratic Model same assumptions as the linear model allows the inversion layer charge to vary between the source and the drain. the current is continuous throughout the channel and also related to the local channel voltage, V C. (2.3.9) According to the above equation the current would even decrease and eventually become negative. The charge density at the drain end of the channel is zero at that maximum and changes sign as the drain current decreases.

18. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Quadratic Model Quadratic model used to calculate some of the small signal parameters, namely the transconductance, g m and the output conductance, g d. The transconductance quantifies the drain current variation with a gate- source voltage variation while keeping the drain-source voltage constant,

19. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Quadratic Model The drain current first increases linearly with the applied drain-to-source voltage, but then reaches a maximum value. As explained in section previous chapter, the charge in the inversion layer does go to zero and reverses its sign as holes are accumulated at the interface. However, these holes cannot contribute to the drain current since the reversed- biased p-n diode between the drain and the substrate blocks any flow of holes into the drain. Instead the current reaches its maximum value and maintains that value for higher drain-to-source voltages.

20. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Quadratic Model A depletion layer located at the drain end of the gate accommodates the additional drain-to-source voltage. This behavior is referred to as drain current saturation (2.3.10) Fig.2.3.2 Current-Voltage characteristics of an n-type MOSFET as obtained with the quadratic model. The dotted line separates the quadratic region of operation on the left from the saturation region on the right.

21. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Variable depletion layer model includes the variation of the charge in the depletion layer between the source and drain. This variation is caused by the voltage variation along the channel (2.3.23) (2.3.24)

22. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Variable depletion layer model Fig. 2.3.3 Comparison of the quadratic model (upper curves) and the variable depletion layer model (lower curves) the quadratic model yields a larger drain current compared to the more accurate variable depletion layer charge model

23. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 2.4 THRESHOLD VOLTAGE

24. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 N-mosfet p-mosfet

25. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Fig. 2.4.1 Threshold voltage of n- type (upper curve) and p-type (lower curve) MOSFETs versus substrate doping density (aluminum gate metal ) The threshold of both types of devices is slightly negative at low doping densities and differs by 4 times the absolute value of the bulk potential. The threshold of nMOSFETs increases with doping while the threshold of pMOSFETs decreases with doping in the same way. A variation of the flatband voltage due to oxide charge will cause a reduction of both threshold voltages if the charge is positive and an increase if the charge is negative.

26. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Effect of Substrate bias The voltage applied to the back contact affects the threshold voltage of a MOSFET. The voltage difference between the source and the bulk, V BS changes the width of the depletion layer and therefore also the voltage across the oxide due to the change of the charge in the depletion region. The threshold difference due to an applied source-bulk voltage can therefore be expressed by

27. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Effect of Substrate bias Where γ is the body effect parameter given by: Fig. 2.4.2Square root of I D versus the gate-source voltage as calculated using the quadratic model (upper curves) and the variable depletion layer model (lower curves ).

28. Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 Effect of Substrate bias the threshold shift is the same for both models. For a device biased at the threshold voltage, drain saturation is obtained at zero drain-to-source voltage so that the depletion layer width is constant along the channel. As the drain-source voltage at saturation is increased, there is an increasing difference between the drain current as calculated with each model. The difference however reduces as a more negative bulk-source voltage is applied. This is due to the larger depletion layer width, which reduces the relative variation of the depletion layer charge along the channel