2. THE MEMORY SYSTEM & INTERCONNECTION STRUCTURE

3. OBJECTIVES Define Memory hierarchy and its characteristics Define various types of memories Define the characteristics of an Interconnection Structure

4. CHARACTERISTICS OF MEMORY SYSTEMS MEMORY CAPACITY WORD SIZE NUMBER OF WORDS

5. UNIT OF TRANSFER WORD BLOCK

6. ACCESS METHOD SEQUENTIAL ACCESS DIRECT ACCESS RANDOM ACCESS ASSOCIATIVE ACCESS

7. MEMORY ACCESS TIME For Random Access: Time taken to read-write a location For non-random Access: Time taken to position read-write mechanism on the desired location

8. PHYSICAL CHARACTERISTICS VOLATILE/NON-VOLATILE ERASABLE/NON-ERASABLE (ROMs)

9. THE MEMORY HIERARCHY Tradeoff among the memory characteristics: Cost Capacity Access Time: Time taken to Read/Write a location in the memory

10. RELATIONSHIPS AMONG THE THREE TERMS

11. Designers want large-capacity but low access time  Employ Memory Hierarchy

12. REGISTERS CACHE MAIN MEMORY DISK CACHE MAGNETIC DISK MAGNETIC TAPE/OPTICAL DISK

13. As you go down the hierarchy: It decreases cost/bit Increases capacity Increases access time Decreases frequency of access of memory by the CPU

14. LOCALITY OF REFERENCE During the course of execution of a program, memory references by the processor, for both instructions and data tend to cluster. Main reasons for clustering: Iterative loop in programs Subroutines/function in programs use of data structures such as arrays in data

15. TYPES OF SEMICONDUCTOR MEMORY RANDOM ACCESS MEMORY (RAM) READ ONLY MEMORY (ROM)

16. SEMICONDUCTOR MEMORY TYPES

17. RAM TECHNOLOGIES DYNAMIC RAM (DRAM): –Cells store data as charge capacitor –Require periodic refreshing STATIC RAM (SRAM): –Traditional flip-flop –Logic-gate configurations –No refreshing

18. DRAM Vs SRAM DRAM is more dense, less expensive but require circuitary for refreshing. DRAMs are slower than SRAMs. For large memory DRAMs are preferred. For small faster memories SRAMs are used.

19. CACHE MEMORY Is built from SRAM technologies Level 1 Cache (L1 Cache) is built into microprocessor Level 2 Cache is normally external to the microprocessor

20. DISK CACHE Used to speedup access to data on a disk. A portion of RAM (called soft disk cache) or A RAM as a part of Hard disk (hard disk Cache) (More expensive).

21. INTERCONNECTION STRUCTURES Collection of paths connecting various modules such as memory, Input/Output & CPU. Most common interconnection structure is BUS and Multiple bus structure.

22. BUS INTERCONNECTION A shared transmission media Only one module transmits at a time, thus, requires arbitration Multiple lines/pathways each transmitting one bit. A bus that connects CPU, memory, I/O is called System bus.

23. SYSTEM BUS Typically 50-100 separate lines. Each line may be assigned a particular meaning. Three functional groups of bus lines: –Data lines –Address lines –Control lines Few lines are also used for Power distribution. Bus may be dedicated or Multiplexed.

24. A TRADITIONAL BUS BASED SYSTEM MAIN MEMORY PROCESSORI/O SYSTEM DATA ADDRESS CONTROL CONTROL BUS

25. SUMMARY We Have Discussed About: The Memory Hierarchy The Characteristics Terms of Memory DRAM & SRAM ROMs & its Variants Bus Interconnections System Bus