Presentation is loading. Please wait.

Presentation is loading. Please wait.

High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh.

Similar presentations


Presentation on theme: "High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh."— Presentation transcript:

1 High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

2 Project Description Designing Pulser which will illustrate how the cellular works during receiving and transmitting sms message. Pulser - will create a single / packet made of a short (0.5-1 nsec)/ long(10-13 nsec) pulse signal, with very low rise/fall time (200ps).

3 Block Diagram Splitter MC100EP11 OSC F=50MHz A N D MC100EP05 MUXMUX NC7SV157 MUX- ים בוחרים בין יציאת הרכיב הקודם לבין כניסת BNC 1 Shot MC74LCX74 MUXMUX Delay Chip MC100EP195 SN74LVC1T45DBVR Translater MC100EPT20 Delay Chip MC100EP195 Microstripline External controllers (Dip switches) ECL technology

4 Signals waveform After and operation ~0.5nsec Signal 1 after the translator and the delay Signal 2 after the translator and the delay Splitting the signal Oscillator waveform Vcc Gnd Level “1” 1-shot waveform 12ns Level “0” 8ns WIDE SHOW THE SLOPES

5 Output output Q Q# DC hight Output #

6 D-1318 PCB development : D-1318 Block diagram Electrical scheme Table of components and status Components places upon the printed board Components places upon the printed board

7 PCB stack up FR4 Insulator - 1 Oz = 0.035 m”m PCB thickness ~1.6m”m Components & microstriplines GND Vtt = 1.33[Volt] Vcc = 3.3 [Volt] Signal control L1 Signal control L2 FR4

8 Parts List NameComponent code Status 1.OscillatorK1144ACEValid 2.MuxNC7SV157Valid 3.Dual supply bus SN74LVC1T45DBVR Valid 4.1-shot (Flip flops)MC74LCX74Valid 5.Translator TTL to ECLMC100EPT20Valid 6.SplitterMC100EP11Valid 7.Programmable delay chipMC100EP195Valid 8.AND gateMC100EP05Valid 9.SMA connectors-Valid 10.Dip switch 4 switches76RSB04STValid 11.Dip switch 12 switches76RSB12STValid 12.Capacitors-Valid 13.Resistors-Valid

9 Electrical scheme

10 High speed Transmit ion lines MC100EPT20  MC100EP11 MC100EPT20  MC100EP11 1. pin 2  pin 7 2. pin 3  pin 6 MC100EP11  (1),(2) MC100EP195 MC100EP11  (1),(2) MC100EP195 1. pin 1  pin 4 (1) 2. pin 2  pin 5 (1) 3. pin 3  pin 4 (2) 4. pin 4  pin 5 (2) MC100EP195 (1),(2)  MC100EP05 MC100EP195 (1),(2)  MC100EP05 1. pin 21 (1)  pin 1 2. pin 20 (1)  pin 2 3. pin 21 (2)  pin 3 4. pin 20 (2)  pin 4 MC100EP05 (OUTPUT) Pins : 6,7

11 Microstripline features (PCB editor) Microstripline Metal 1 t h w Z 0 = impedance of free space. dielectric constant of substrate. w = width of strip. h = thickness ('height') of substrate. t = thickness of strip metallization.

12 References Wikipedia http://en.wikipedia.org/wiki/Microstrip Microwaves, K. C. Gupta, New age international p. 198-201.


Download ppt "High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh."

Similar presentations


Ads by Google