1. RT level combinational blocks Paolo PRINETTO Politecnico di Torino (Italy) University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it Lecture 5.1

2. 2 5.1 Goal  This lecture presents the set of functional blocks that are usually considered to be “elementary” or “basic” at the RT level.

3. 3 5.1 Prerequisites  Lecture 3.3

4. 4 5.1 Homework  No particular homework is foreseen

5. 5 5.1 Further readings  Students interested in making a reference to a text book on the arguments covered in this lecture can refer, for instance, to:  M. Morris Mano, C.R.Kime: “Logic and Computer Design Fundamentals,” 2nd edition updated Prentice Hall, Upple Saddle River, NJ (USA), 2001, (chapter 3, pp. 111-148 )

6. 6 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

7. 7 5.1 Adders We shall consider:  half adder  full adder  adder-subtracter

8. 8 5.1 Half-Adder A half-adder has:  2 inputs A i, B i  2 outputs S i and C i+1 and computes the binary sum of the 2 input bits, providing:  the sum S i  the carry C i+1

9. 9 5.1 S i = A i  B i C i+1 = A i  B i A i B i C i+1 S i

10. 10 5.1 Full-Adder A full-adder has:  3 inputs A i, B i and C i  2 outputs S i and C i+1 and computes the binary sum of the 3 input bits, providing:  the sum S i  the carry C i+1

11. 11 5.1 S i = A i  B i  C i C i+1 = A i B i + A i C i + B i C i = = A i B i + ( A i  B i ) C i  A i B i C i C i+1 S i

12. 12 5.1 Adder-subtracter An adder-subtracter is a combinational block capable of adding/subtracting two n-bits inputs operands, detecting overflow conditions. It has  2 n-bits data inputs, both labeled from n-1 to 0  1 control input to select one of the two operations  1 n-bits data output  1 control output asserted when an overflow condition is occurred.

13. 13 5.1 Adder-subtracter Adder-subtracter (cont’d) FUNC(n-1 downto 0) A(n-1 downto 0) B(n-1 downto 0) ADD/~SUB OVFL Symbol

14. 14 5.1 Elementary functional blocks Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces Multiplexer

15. 15 5.1 Multiplexer A multiplexer is a combinational block capable of forcing its output to the current value of one of its inputs, according to the values of some control signals. Each input can be either a single wire or a bus.

16. 16 5.1 Multiplexer A multiplexer has:  2 k data inputs, labeled from 2 k -1 to 0  k control inputs  1 data output. k 2 k -1 2 k -2 2 1 0 MUX … It gets the value present on the input labeled 2 i, where i (0  i  k-1) is the binary number present on the control inputs.

17. 17 5.1 OUT SEL(k-1 downto 0) Multiplexer (cont'd) Symbol IN(2 k -1 downto 0)

18. 18 5.1 Multiplexer (cont’d) Symbol M0(n-1 downto 0) OUT(n-1 downto 0) M1(n-1 downto 0) M2(n-1 downto 0) M2 k -1(n-1 downto 0) SEL(k-1 downto 0)

19. 19 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

20. 20 5.1 Decoder A decoder k  2 k has:  1 n-bit data input  2 n outputs, labeled from 0 to 2 n -1  1 enable. When enabled, just the output labeled 2 j is active, where j is the value present on the data input. When disabled, no output is active.

21. 21 5.1 Decoder (cont’d) Symbol DOUT(0) DIN(n-1 downto 0) ENABLE DOUT(1) DOUT(2) DOUT(2 n -1)

22. 22 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

23. 23 5.1 Priority Encoder A priority encoder has:  2 k inputs, labeled from 0 to 2 k -1 (each input is assigned a fixed priority)  k outputs  1 “data valid” output  1 enable.

24. 24 5.1 Priority Encoder (cont’d)  When enabled:  the outputs get the value j, where j is the label of the highest priority asserted input  the “data valid” output is asserted.  When disabled or when no input is asserted:  the “data valid” output is not asserted.

25. 25 5.1 M0 CODE(n-1 downto 0) ENABLE M1 M2 M2 n -1 Priority Encoder (cont’d) VALID Symbol

26. 26 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

27. 27 5.1 Comparator A comparator gets 2 n-bit binary numbers:  A(n-1 downto 0)  B(n-1 downto 0) and provides in output the result of the comparison between A and B. A control input UM/~2C specifies whether the input operands are unsigned or signed, respectively.

28. 28 5.1 Comparator (cont’d) A B AeqBAneBAltBAgtBAleBAgeB Symbol B(n-1 downto 0) A(n-1 downto 0) UM/~2C Sel

29. 29 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

30. 30 5.1 Counter of 1’s occurrences A counter of 1’s occurrences has:  1 n-bit data input  1 m-bit data output, being m =  log 2 n . The device counts the number of occurrences of a ‘1’ on its inputs and provides it on its outputs.

31. 31 5.1 Counter of 1’s occurrences Counter of 1’s occurrences (cont’d) Symbol DIN(n-1 downto 0) 1’s C DOUT(m-1 downto 0)

32. 32 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

33. 33 5.1 ROM A 2 k  n ROM (Read-Only Memory) has:  k address inputs  n data outputs  2 k n-bit internal cells, storing permanent values. The outputs gets the value stored in the j cell, j being the current value present on address inputs.

34. 34 5.1 ROM (cont’d) ADDR D_OUT Symbol ADDR(2 k -1 downto 0) DATA(n-1 downto 0)

35. 35 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

36. 36 5.1 ALU An n-bit ALU (Arithmetic Logic Unit) performs logic and/or arithmetic operations on 2 n-bit operands, under the control of ad-hoc control signals.

37. 37 5.1 ALU (cont’d) FUNC(n-1 downto 0) CONTROL C_IN C_OUT STATUS Symbol B(n-1 downto 0) A(n-1 downto 0)

38. 38 5.1 F=A  B F=A  B' Functions implemented by the ALU ’181 InputFunctions S3S2S1S0arithmetic (M=0)logic (M=1) 0000 0001 0010 001 0100 0101 0110 1 0111 1000 1001 1010 1011 1100 1101 1110 1111 F=A minus 1 plus CIN F=AB minus 1 plus CIN F=AB' minus 1 plus CIN F=1111 plus CIN F=A plus (A+B') plus CIN F=AB plus (A+B') plus CIN F=A minus B minus 1 plus CIN F=A+B' plus CIN F=A plus (A+B) plus CIN F=A plus B plus CIN F=AB' plus (A+B) plus CIN F=A+B plus CIN F=A plus A plus CIN F=AB plus A plus CIN F=AB' plus A plus CIN F=A plus CIN F=A' F=A'+ B' F=A'+ B F= 1111 F=A'B' F=B' F=A+B' F=A'B F=B F=A+B F=0000 F=AB' F=AB F=A

39. 39 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

40. 40 5.1 Multiplier A multiplier has:  1 n-bits data inputs, labeled from n-1 to 0  1 m-bits data inputs, labeled from m-1 to 0  no control signals  k-bits data outputs, labeled from k-1 to 0 and provides in output the results of the product between the two input operands.

41. 41 5.1 Multiplier (cont’d) MUL_OUT(k-1 downto 0) * B(n-1 downto 0) A(m-1 downto 0) Symbol

42. 42 5.1 Multiplier (cont’d) MUL_OUT(k-1 downto 0) * B(n-1 downto 0) A(m-1 downto 0) Symbol Signed operands: k=m+n- 1Signed operands: k=m+n- 1 Unsigned operands: k=m+nUnsigned operands: k=m+n

43. 43 5.1 Elementary functional blocks Multiplexer Adder- Subtracter Decoder Encoder Comparator ROM ALU Multiplier 1’s counter I/O interfaces

44. 44 5.1 I/O interfaces The combinational interfaces for the following I/O devices will be presented:  led bar driver  7-segments display  dip-switch  keypad.

45. 45 5.1 Led bar interface LED_BAR interface n DATA(n-1 downto 0)

46. 46 5.1 DATA DISPLAY interface 4, 7 DOT ENABLE 7-segments display interface

47. 47 5.1 a b c d e f g BI A B C D a b c d e f g a b c d e f g DOT ENABLE 7-segments display interface

48. 48 5.1 Dip-switch interface DATA DIP_SW interface n n

49. 49 5.1 Keypad interface DATA KEYPAD interface 4, 701234567 89AB CDEF DATA_VALID