1. WTO Information technology symposium. "The Challenges ahead for the ITA with Converging Technologies and IC Manufacturing Techniques" Ray Foy – Intel Corp. EMEA Customs & Licensing manager

2. Moores Law The number of transistors on a chip will double every 18-24 months 1,000 10,000 100,000 1,000,000 10,000,000 100,000,000 1,000,000,000 1970 1980 1990 2000 2010 4004 8080 8086 8008 Pentium 486 DX 386 286 Pentium II Pentium III Pentium 4 1 Billion transistors before 2010 42 Million # of transistors

3. Interconnects Transistor Precision at the molecular and atomic levels. 23 masking layers. Some layers are thinner than a virus. Building an Integrated Circuit 1/10 th Thickness of Human Hair! ~ 60 days to manufacture

4. Process Trends: New Generation Every 2 Years 10000 1000 100 10 10 1 0.1 0.01 Micron Nano-meter Nominal feature size Nanotechnology 130nm 90nm 70nm 50nm Gate Length Source: Intel 19701980 1990 200020102020

5. Processor Technology 1 nanometer = 1 billionth of a meter Silicon Process Technology 800nm600nm350nm250nm180nm130nm Transistors (Millions) Pentium ® Processor Pentium ® Pro Processor Pentium ® II Processor Pentium ® III Processor Pentium ® 4 Processor Itanium ® 2 Processor 3.35.57.5 9.5 - 25 42 + 480 Smaller, Faster, Better, Cheaper

6. Average Transistor Price By Year Source: Dataquest/Intel12/02 0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 '68'70'72'74'76'78'80'82'84'86'88'90'92'94'96'98'00'02 $

7. Si Technology: Complexity Increasing Exponentially

8. Roadmap Trends: Summary More Speed per processors More memory integration More processors per core More transistors per processor. More complex manufacturing. Larger wafers Narrower circuits. The boundaries of physical science are the perennial challenge.

9. Today 2003/2004 2004/2005 2005/2006 Chip Scale Stacked Package Folded Stacked Chip Scale Package Next generation Multichip Module Thru silicon and other advanced package options SIP Technologies: Stacked Die + Stacked Packages Stacked thin die +Packagingintegration +Packagingintegration

10. Microprocessor evolution – 1996 / 1997 Pentium® Pro Processor 8473.30 L2 Cache/ TAG/ Controller CPU & L1 Cache/ Controller Pentium (R) II Processor 8473.30 Dual die processor Cartridge package.

11. Multichip side by side in package

12. Vertical stacked ICs in package

13. Integrated Circuit stacking. Simple model – multi chip.

14. Multi- substrate / multi IC in package

15. Processor package x section

16. * data is run rate exiting the year. Source: Intel, *Other names and brands may be claimed as the property of others All CPU development on Dual/Multi-Core All CPU development on Dual/Multi-Core Moving from Chips/Computer to Computers/Chip Multi chips are already here.

17. Processor x section

18. Processor packaging – The problem with passives! Passive devices move classification outside HS 8542 Passive devices move classification outside HS 8542

19. The problem with passives. Integrated Passives (on silicon) –passive components on silicon, created in the mass to all intents and purposes indivisible. –Combined in multichip forms with other active ICs ALTERNATIVE TECHNOLOGY –TO CERAMIC / OTHER FORMS –SIGNIFICANT REDUCTION IN SIZE. –DRIVES FURTHER MINIATURISATION –All products of the semiconductor industry. BUT NOT ACCORDING TO THE CURRENT H.S.

20. BROADBANDEntertainment, E-Business, Services MEDIA Pre-Recorded Content Personal Media Personal Media BROADCASTServices,Entertainment Any Content 1, Any Place, Any Device, Any Time Digital Home Vision 1 As Authorized

21. Digital Home: All Devices and Content are going Digital

22. Innovation Demand COMPUTING COMMUNICATIONS All computing devices communicate All communication devices compute All enabled by silicon Convergence Vision Any Time, Anywhere, Any Device

23. Summary Miniaturising –Micron-scale to nano-scale. Functionalising. –Reduced size enables more functions in less space (all on silicon) –More integration / more complexity. Converging. (computing and comunications) –Developers put more optimum functionality for multiple application.

24. The Challenge The HS is unable to cope with the advance of technology. The problem is NOW! –All computing devices communicate –All communication devices compute –All enabled by silicon. Silicon circuitry and high density packaging serve: –energy conservation –Miniaturisation –Complex multifunctionality. The current HS should not be a limiter to ITA expansion.