1. vargas@computer.org1 Test Based on Current Monitoring: I DDq Testing

2. vargas@computer.org2 Up to now, fault-tolerance has been based on the observation of system logic states. The next slides describe a new paradigm: decide if the system is correct or faulty by observing the current (I DDq ) consumption. This approach is also based on HW redundancy, since extra logic is placed on-board or on-chip in the form of dedicated chips or IP-cores, respectively.

3. vargas@computer.org3 Em 1963 Frank Wanlass (Fairchild Semiconductor) publicou o conceito de circuito CMOS. Ocorreu- lhe que um circuito CMOS usa muito pouca potência quando em standby, na verdade a única corrente que fluiria seria a corrente de leakage. What is IDDq?

4. vargas@computer.org4 Reference Paper: Mark W. Levi in his ITC’1981 paper (“CMOS is most Testable”, Proceedings of ITC’81, pp. 217-220). What is IDDq?

5. vargas@computer.org5 What is IDDq? Faulty Behavior

6. vargas@computer.org6 What is IDDq? Faulty Behavior

7. vargas@computer.org7 What is IDDq? Mede a corrente de entrada em condição de steady state. Nenhum caminho direto entre V DD e Gnd. Sem defeito -> alta impedância entre V DD e Gnd no estado quiescente! Se o IC puxa corrente -> defeito!

8. vargas@computer.org8 n Determinar o threshold u Muito alto (qual o problema?) u Muito baixo (qual o problema?) Dificulties involved with I DDq Monitoring

9. vargas@computer.org9 Dificulties involved with I DDq Monitoring

10. vargas@computer.org10 Devemos jogar todos os CIs com I DDq anormal no lixo, mesmo que passem em outros tipos testes? Dificulties involved with I DDq Monitoring Sim !

11. vargas@computer.org11 Types of Defects Detected by I DDq Monitoring

12. vargas@computer.org12 n O teste de I DDQ é mais difícil para 130-nm ou processos menores, porque o ruído no circuito dificulta a distinção entre o dispositivo bom e o com falha. I DDq and Technology Scaling

13. vargas@computer.org13 Goal: I DDQ fault coverage of 95% or greater I DDq Fault Coverage

14. vargas@computer.org14 n Módulos Monitores On-Board Chips monitores que são colocados na placa Techniques for Measurements (1)

15. vargas@computer.org15 n Módulos Monitores On-Board Chips monitores que são colocados na placa Techniques for Measurements (1)

16. vargas@computer.org16 On-Board Test Controller (or Automatic Test Equipment ) Synchronization n Módulos Monitores On-Board Chips monitores que são colocados na placa Techniques for Measurements (1)

17. vargas@computer.org17 n Módulos Monitores On-Chip Núcleos IP monitores que são colocados on-chip Techniques for Measurements (2) ICCD 1988

18. vargas@computer.org18 Techniques for Measurements (2) n Módulos Monitores On-Chip Núcleos IP monitores que são colocados on-chip

19. vargas@computer.org19 Techniques for Measurements (2) n Módulos Monitores On-Chip Núcleos IP monitores que são colocados on-chip

20. vargas@computer.org20 Techniques for Measurements (2) n Módulos Monitores On-Chip Núcleos IP monitores que são colocados on-chip

21. vargas@computer.org21 Techniques for Measurements (3)

22. vargas@computer.org22 1K x 1bit SEU-Tolerant SRAM Chip with Core Size: 3.5 X 4.6mm 2 Techniques for Measurements (3)

23. vargas@computer.org23 Thank you for your attention