1. Principles Of Digital Design Chapter 1 Introduction Design Representation Levels of Abstraction Design Tasks and Design Processes CAD Tools

2. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 2 Behavioral or functional representation  Specifies the behavior or the function of a design without any implementation information Structural representation  Specifies the implementation of a design in terms of components and their interconnections Physical representation  Specifies the physical characteristics of the design  Blueprint for manufacturing Design Representation

3. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 3 Pulse =  Seconds = Seconds + 1 S display = Seconds Seconds = 0? Minutes = 0? Minutes = Minutes + 1 M display = Minutes Hours = Hours + 1 H display = Hours Clock Process yes no Alarm Clock (Behavioral Representation)

4. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 4 Minutes = Minutes + 1 M display = Minutes Hours = Hours + 1 H display = Hours Setup Process S 2 closed? S 1 closed? S 3 closed? S 4 closed? Mwakeup = Mwakeup + 1 M display = Mwakeup Hwakeup = Hwakeup + 1 H display = Hwakeup no yes no yes no yes no Alarm Clock (Behavioral Representation)

5. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 5 Minutes = Mwakeup? Buzz = 1 Alarm Process Hours = Hwakeup? S 5 closed? yes no yes no yes Alarm Clock (Behavioral Representation)

6. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 6 Alarm Clock (Structural Representation) S cnt H display M display S display M cntH cnt M regH reg Minute comparator Pulse generator Oscillator Hour comparator 1 Sound generator Pulse S 1 (Time set) S 3 (M advance) S 4 (H advance) S 2 (Alarm set) S 5 (Alarm on) S2S2 S2S2 S3S3 S4S4 Buzz

7. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 7 Alarm Clock (Pulse Wave) 1 second 0 1 (a) Sine wave (b) Pulse wave Generated by Oscillator Generated by Pulse generator

8. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 8 HOURS MINUTES ALARMTIMESET ALMTIMEONOFF Front view PGSGOSC DS Sound generator Pulse generator Oscillator Minute advance switch Battery holder Liquid display Hour advance switch Set and alarm switches Printed circuit board Alarm Clock (Physical Representation)

9. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 9 Levels of Abstraction Levels Behavioral forms Structural components Physical objects Transistor Differential equ., current-voltage diagrams Transistors, resistors, capacitors Analog & digital cells Logic Boolean equations, finite-state machines Gates, flip-flops Modules or units Processor Algorithms, flowcharts, instruction sets, generalized FSM Adders, comparators, registers, counters, register files, queues Microchips System Executable specification, programs Processors, controllers, memories, ASICs, ASIPs, IPs Printed-circuit boards or System-on-chip

10. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 10 Top-down Bottom-up Meet-in-the-middle Design Methodologies

11. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 11 Design Specification Library Development Design Synthesis Design Analysis  Property verification  Constraint satisfaction for cost, performance, power, testability manufacturing, and other metrics Documentation Manufacturing Design Process  System synthesis  Logic synthesis  Architecture synthesis  Circuit design  Sequential synthesis  Layout generation

12. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 12 Design Capture and Modeling  Schematic capture  Modeling in a hardware-description language Synthesis Tools  Logic synthesis  Sequential synthesis  Behavioral or high-level synthesis  System synthesis Verification and Simulation Physical Design  Placement  Routing Testing CAD Tools

13. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 13 Typical Design Process Market Analysis Physical Design Product Requirements Test Generation Product Specification Documentation Product Architecture Manufacturing Product Design Testing Verification or Simulation

14. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 14 Road Map of Digital Design Transistors, resistors, capacitors Analog circuit design Analog components Digital circuit design Electronics Boolean algebra Logic gates and flip-flops Finite-state machine Logical design techniques Sequential design techniques VLSI design Binary system and data representation Combinational components Storage components Interface components Generalized finite-state machines Algorithm synthesis Processor components Software design and engineering Hardware, software, and mechanical codesign Embedded system design Computer design Material covered in book

15. Copyright © 2004-2005 by Daniel D. Gajski Slides by Philip Pham, University of California, Irvine 15 Chapter Summary Three Design Representations  Behavioral  Structural  Physical Four Levels of Abstraction  System  Processor  Register  Gate CAD Tools  Capture and Modeling  Verification and Simulation  Synthesis and Analysis  Placement and Routing  Test Generation Road Map