1. ACOE255 – Microprocessor Architecture

2. Some Information
Instructor Details
Main Book

3. Course Information Programme of Studies:
BSc in Computer Engineering, BSc in Computer Science
Name of the Course:
ACOE255 - Microprocessors I
Target group and type:
Computer Engineering (Core)
Level of the unit:
BSc – 4th Semester
Intermediate
Entrance requirements:
ACOE201
Language of instruction:
English
Number of ECTS credits:
6 (Average student working time: 150 hours)
Main competences to be developed by the students:
Program Competences
BSc.CoE
BSc.CS 1
Knowledge of the operation and interfaces of Intel microprocessors.
A4, C1 2
Ability to design digital circuits required for the implementation of memory and peripheral interfacing.
C2, C3, C7 3
Ability to use polling, interrupts and Direct Memory Access techniques in processor-based systems.
B7, C2, C3, C7 4
Capacity to design both hardware and software for Intel processor-based applications.
B1, B7, C3, C7 5
Skills required for the conduct of laboratory work related to monitoring the operation of a microprocessor and using a microprocessor for I/O, control and monitoring applications
A13, B7
Furthermore, the course contributes to the development of the following program competences
A10, A11

4. Course Overview Prerequisites: ACOE201
Introduction to microprocessors:
microprocessor technologies
Pin and signal descriptions
loading and timing of the 80x86 microprocessors.
Bus drivers, clock and reset circuits.
Memory interfacing, and synchronization:
Interfacing with EPROMs, Static and Dynamic RAMs.
Address decoding, memory maps and memory mirroring.
Static and dynamic bus contention.
Memory timing analysis, synchronization
Input/Output interfacing:
Isolated and memory mapped I/O.
LEDs, 7-segment displays, switches, keyboards relays and ac loads.
I/O synchronization using interrupts and the polling technique.
Interrupts. Use of programmable I/O devices.
Direct Memory Access
Analog interfacing: Digital to analog and analog to digital converters
Laboratory Work: Small group experiments performed with single board computers. Experiments include monitor commands, reset circuits, buffering, memory interfacing and I/O interfacing.

5. Course Assessment Assignment – 10% (approx. week 10)
Mid-term exam – 10% (approx. week 6)
Laboratory work – 20%
Final – 60%

6. HISTORICAL PERSPECTIVE
1st generation:
Tubes, punchcards
2nd generation:
transistors
3rd generation: 1965 – 1980
Integrated circuits
4th generation: 1980 –
PCs and workstations

7. 1st generation (1945-1955) Programming was done in machine language
No operating system
Programming and maintenance done by one group of people

8. ENIAC – The first electronic computer (1946)
18,000 tubes
300 Tn
170 KWatt

9. 2nd generation (1955-1965) Transistor-based Fairly reliable
Clear distinction between designers, manufacturers, users, programmers, and support personnel.
Only afforded by governments, universities or large companies (millions $)

10. 2nd generation ( )
Program was first written on paper (FORTRAN) and then punched into cards
Cards were then delivered to the user.
Mostly used for scientific and technical calculations
Solving differential equations

11. 3rd generation (1965-1980) IC-based operation
IBM develops compatible systems
Tradeoffs in performance, memory, I/O etc).
Greater MHz/$

12. 4th generation (1980-1990) LSI-based PCs Significantly cheaper
User-friendly software
2 dominant operating systems:
MS DOS: IBM PC (8088, 80286, 80386, 80486)
UNIX: RISC workstations

13. 5th generation (1990-) PC networks Network operating systems
Each machine runs its own operating system
Users don’t care where their programs are being executed

14. Famous quotes “Future computers may weigh less than 1,5 tn”, (1949)
“I believe there is a world market for five computers”, T. Watson, IBM CEO (1943)
“There is no particular reason why someone would want a computer at home”, K. Oslon, president of DEC (1974)
“640Κbytes of memory should be enough for anybody”, B. Gates, president of Microsoft (1981)

21. Microprocessor Technologies (Orthogonal)
VLSI technology
Computer Architecture
Compiler technology

23. Moore’s Law

24. Intel 4004 Micro-Processor

29. Recent advances

30. The Future: 3D ICs 3D integration: One chip DNA Chip Battery MEMS
Memory
Processor
RF Chip
DNA Chip
MEMS
Battery
Image Sensor
3D integration: One chip

31. Computer Architecture

32. RISC vs. CISC Complex instruction set computer (CISC):
Large instruction set;
Complex operations;
Complex addressing modes;
Complex hardware, long execution time;
Minimum number of instructions needed for a given task;
Easy to program, simpler compiler.
Reduced instruction set computer (RISC):
Small instruction set;
Simple instructions to allow for fast execution (fewer steps);
Large number of registers;
Only read/write (load/store) instructions should access the main memory, one MM access per instruction;
Simple addressing modes to allow for fast address computation;
Fixed-length instructions with few formats and aligned fields to allow for fast instruction decoding;
increased compiler complexity and compiling time;
simpler and faster hardware implementation, pipelined architecture.

33. RISC vs. CISC example CISC (M68000) RISC (MIPS)
Add the content of MM location pointed to by A3 to the component of an array starting at MM address 100. The index number of the component is in A2. The content of A3 is then automatically incremented by 1.
RISC (MIPS)

34. Memory Architecture
Von Neumann: Common memory for data and instructions
Harvard: Separate data and instruction memories

35. Von Neumann Memory Architecture
address
CPU PC
200
data
200
ADD r5,r1,r3
ADD r5,r1,r3 IR

36. Harvard Memory Architecture
address
CPU
data memory
data PC
address
program memory
data

37. References
Weste, Harris, CMOS VLSI Design: A Circuits and Systems Perspective
Patterson, Hennessy - Computer Organization and Design; The Hardware-Software Interface, 2E (Morgan Kaufman, 1997)
Fundamentals Of Computer Organization And Architecture (2005) Wiley