1. Interrupts and DMA CSCI 4534

2. The Role of the Operating System in Performing I/O Two main jobs of a computer are: –Processing –Performing I/O manage and control I/O operations manage and control I/O devices

3. Performing I/O A device communicates with a computer system by sending signals over a cable (or through the air) – The device communicates with the machine via a connection point called a port –If > 1 device uses a common set of wires, the connection is called a bus

4. Performing I/O A controller is a collection of electronics that can operate a port, a bus, or a device –It could be: a chip or an entire circuit board (eg. SCSI bus controller) –typically contains a processor, microcode and private memory

5. Performing I/O How does the processor give commands and data to a controller for an I/O transfer? –The controller has one or more registers for data and control signals The processor reads/writes bit patterns in the registers –Or the device controller uses memory-mapped I/O A certain range of memory addresses corresponds to I/O device registers

6. Performing I/O I/O ports usually consist of four registers –status current instruction complete? byte available to be read? –control start a command change mode of the device –data-in: read by the host (input) –data-out: written by host (output)

7. Interaction Between the Host and a Controller Can be done by: –Polling –Using Interrupts

8. Interrupts Basic interrupt processing –The CPU has a wire called the interrupt request line (IRQ) that the CPU senses after each instruction –When the CPU detects that a controller has put a signal on the line: the CPU saves the state - IP, register values, etc. jumps to the appropriate interrupt handler routine at a fixed location in memory

9. Interrupts the interrupt handler: –determines the cause of the interrupt –does whatever processing is necessary –executes a return from interrupt instruction to return to the previous state of the CPU Terminology that is similar to what we have heard before: –the device controller raises an interrupt by a signal on the IRQ line –the CPU catches the interrupt and dispatches it to the appropriate interrupt handler –the handler clears the interrupt by servicing the device

10. Direct Memory Access Programmed I/O –A CPU might be responsible for transferring each byte of a file between memory and I/O devices (controllers) This is wasteful for a device that does large transfers

11. Direct Memory Access A solution is Direct Memory Access (DMA) –A special purpose processor (a DMA controller) handles the data transfer A host writes a DMA command containing: –a pointer to the source of the transfer –a pointer to the destination of the transfer –a count of the number of bytes being transferred Then the DMA controller places addresses on the bus to transfer data without help of the CPU The CPU is interrupted when transfer is complete