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Fundamental of Computer Architecture By Panyayot Chaikan 240-208 November 01, 2003.

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Presentation on theme: "Fundamental of Computer Architecture By Panyayot Chaikan 240-208 November 01, 2003."— Presentation transcript:

1 Fundamental of Computer Architecture By Panyayot Chaikan panyayot@coe.psu.ac.th 240-208 November 01, 2003

2 Chapter 2 - Data Representation in Computer 2 240-208 Fundamental of Computer Architecture Chapter 2 รูปแบบของข้อมูลใน คอมพิวเตอร์ Data representation in computer

3 Chapter 2 - Data Representation in Computer 3 240-208 Fundamental of Computer Architecture เนื้อหา รูปแบบการจัดเก็บข้อมูลลงบนคอมพิวเตอร์ ตัวเลขฐานสองแบบมีเครื่องหมาย Overflow ของการกระทำทางคณิตศาสตร์ของ ตัวเลข เลขทศนิยมแบบ Fixed-Point เลขทศนิยมแบบ Floating-Point การกระทำทางคณิตศาสตร์กับเลขทศนิยมแบบ Floating-Point

4 Chapter 2 - Data Representation in Computer 4 240-208 Fundamental of Computer Architecture Number representation  ลองพิจารณาตัวเลข  เมื่อ  b i = 0 หรือ 1 jj  ค่าของ B หาได้จาก B = b n-1.....b 1 b 0 Value of B = b n-1 x 2 n-1 +.... + b 1 x 2 1 + b 0 x 2 0

5 Chapter 2 - Data Representation in Computer 5 240-208 Fundamental of Computer Architecture Binary, signed-integer representations

6 Chapter 2 - Data Representation in Computer 6 240-208 Fundamental of Computer Architecture Addition/Subtraction of Signed numbers  2’s complement is the most efficient method

7 Chapter 2 - Data Representation in Computer 7 240-208 Fundamental of Computer Architecture Addition/Subtraction of Signed numbers  Use only Adder  Subtraction:Perform 2’s complement with subtrahend

8 Chapter 2 - Data Representation in Computer 8 240-208 Fundamental of Computer Architecture Addition/Subtraction of Signed numbers

9 Chapter 2 - Data Representation in Computer 9 240-208 Fundamental of Computer Architecture Overflow in Integer arithmetic  4-bit signed number ranges from -8...+7  the result from addition  more than +7 or less than -8, overflow occurred Overfl ow

10 Chapter 2 - Data Representation in Computer 10 240-208 Fundamental of Computer Architecture Overflow  Overfolow detection rules:  1. Overflow can occur only when adding 2 numbers that have the same sign  2. When adding X and Y, overflow occurs when the sign of result is not the same as the sign of X and Y

11 Chapter 2 - Data Representation in Computer 11 240-208 Fundamental of Computer Architecture Number representation  We always represent a number in the 2’s complement system  4 bit-8...+7  8 bit-128...+127  16 bit-32768....+32767  32 bit-2147483648.... +2147483647

12 Chapter 2 - Data Representation in Computer 12 240-208 Fundamental of Computer Architecture Sign extension  To represent 2’s complement signed number using larger number of bits, repeat the sign bits as many times as needed to the left  for example : convert 4 bits to 8 bits  1001 (-7) 11111001(-7)

13 Chapter 2 - Data Representation in Computer 13 240-208 Fundamental of Computer Architecture Characters  ASCII : American Standard Code for Information Interchange ที่มาของรูป http://www.jimprice.com/ascii-0-127.gif

14 Chapter 2 - Data Representation in Computer 14 240-208 Fundamental of Computer Architecture Memory location and Addresses  Memory consists of many millions of storage cells,each of which can store a bit of information (0/1)  memory is organized into a group of n bits can be stored or retrieved in a single, basic operation  Each group of n bits is referred to as a word of information

15 Chapter 2 - Data Representation in Computer 15 240-208 Fundamental of Computer Architecture Memory location and Addresses  Bit, byte, word  A unit of 8 bit is called byte  Word length typically ranges from 16 to 64 bits  CPU access data in memory for 1 word at a time

16 Chapter 2 - Data Representation in Computer 16 240-208 Fundamental of Computer Architecture Word  32-bit word can store  32-bit 2’s complement number  four ASCII characters

17 Chapter 2 - Data Representation in Computer 17 240-208 Fundamental of Computer Architecture Memory accessing  To access the memory, addresses for each memory location is required  Addresses range from 0 through 2 k-1 for 2 k address space  24-bit address generates address space of 2 24 or 16,777,216 locations.

18 Chapter 2 - Data Representation in Computer 18 240-208 Fundamental of Computer Architecture Byte addressable memory  most modern computer have successive addresses refer to successive byte location in the memory  Byte locations have address 0,1,2,3.....  Successive words are located at addresses 0,4,8,12,.... (for 32-bit machine)

19 Chapter 2 - Data Representation in Computer 19 240-208 Fundamental of Computer Architecture Big-Endian and Little- Endian assignments  2 ways to assign byte address across words

20 Chapter 2 - Data Representation in Computer 20 240-208 Fundamental of Computer Architecture Little endian VS Big endian

21 Chapter 2 - Data Representation in Computer 21 240-208 Fundamental of Computer Architecture Little endian VS Big endian

22 Chapter 2 - Data Representation in Computer 22 240-208 Fundamental of Computer Architecture Word alignment  For Example: keeping value 201F539AH in memory

23 Chapter 2 - Data Representation in Computer 23 240-208 Fundamental of Computer Architecture Fixed-point number F(B) = (- b 0 x 2 0 )+ (b -1 x 2 -1 )+(b -2 x 2 -2 )+... + (b -(n-1) x 2 -(n-1) ) B = b 0.b -1 b -2.....b - (n-1) -1 (1- 2 -(n-1) ) Sign bit

24 Chapter 2 - Data Representation in Computer 24 240-208 Fundamental of Computer Architecture Fixed-point number F(B) = (- 1 x 2 0 )+ (1 x 2 -1 )+(0 x 2 -2 )+(0 x 2 -3 )+(1 x 2 - 4 )+(0 x 2 -5 )+ (1 x 2 -6 )+(1 x 2 -7 ) = - 1+0.5+0+0+0.0625+0+0.015625+0.0078125 = -0.4140625 F(B) = 1.1001011

25 Chapter 2 - Data Representation in Computer 25 240-208 Fundamental of Computer Architecture Fixed-point number  32-bit, signed, fixed point represent value range approximately 4.55*10 -10 to 1  This is not sufficient for scientific caclulation such as  Avogadro’s number 6.0247*10 23 mole -1  Planck’s constant 6.6254*10 -27 erg s

26 Chapter 2 - Data Representation in Computer 26 240-208 Fundamental of Computer Architecture Floating-point number  General form for floating point number in decimal system +X 1.X 2 X 3 X 4 X 5 X 6 X 7 *10 +Y1Y2  When the decimal point is placed to the right of the first(nonzero) significant digit, the number is said to be normalized Significant digits exponent

27 Chapter 2 - Data Representation in Computer 27 240-208 Fundamental of Computer Architecture IEEE standard floating- point format Sign bit 8-bit signed exponent in excess-127 representation 23-bit mantissa fraction Value represented = + 1.M x 2 E’-127

28 Chapter 2 - Data Representation in Computer 28 240-208 Fundamental of Computer Architecture IEEE standard floating- point format E =signed exponent E’ = E + 127 1 < E’ < 254, 0 and 255 are used to represent special values -126 < E < 127 Value represented = + 1.M x 2 E

29 Chapter 2 - Data Representation in Computer 29 240-208 Fundamental of Computer Architecture Special Values E’ = 0 and M = 0 -----> 0 E’ = 255 and M = 0 ----->  E’ = 0 and M ≠ 0 - ----> denormal number E’ = 255 and M ≠ 0 --- --> NaN (not a number)

30 Chapter 2 - Data Representation in Computer 30 240-208 Fundamental of Computer Architecture 1.0010110….1 x 2 -87 floating-point format : Example

31 Chapter 2 - Data Representation in Computer 31 240-208 Fundamental of Computer Architecture 0.0010110…. x 2 9 Normalized vs unnormalized value Unnormalized value

32 Chapter 2 - Data Representation in Computer 32 240-208 Fundamental of Computer Architecture 1. 0110…. x 2 6 Normalized vs unnormalized value Normalized value

33 Chapter 2 - Data Representation in Computer 33 240-208 Fundamental of Computer Architecture Floating-point Add/Subtract rule  1. Choose the number with the smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents  2. Set the exponent of the result equal to the larger exponent  3. Perform addition/subtraction on the mantissas  4. Normalize the resulting value, if necessary

34 Chapter 2 - Data Representation in Computer 34 240-208 Fundamental of Computer Architecture Floating-point Add/Subtract:Example 2.9400 x 10 2 + 4.3100 x 10 4 = 0.0294 x 10 4 + 4.3100 x 10 4 = 4.3688 x 10 4

35 Chapter 2 - Data Representation in Computer 35 240-208 Fundamental of Computer Architecture Floating-point Multiply rule  1. Add the exponents and subtract 127  2. Multiply the mantissas and determine the sign of the result  3. Normalize the resulting value, if necessary

36 Chapter 2 - Data Representation in Computer 36 240-208 Fundamental of Computer Architecture Floating-point Multiply:Example 2.9400 x 10 2 x 4.3100 x 10 4 = (2.9400 x 4.3100) x 10 (2+4) = 12.6714 x 10 6 = 1.26714 x 10 7

37 Chapter 2 - Data Representation in Computer 37 240-208 Fundamental of Computer Architecture Floating-point Divide rule  1. Subtract the exponents and add 127  2. Divide the mantissas and determine the sign of the result  3. Normalize the resulting value, if necessary

38 Chapter 2 - Data Representation in Computer 38 240-208 Fundamental of Computer Architecture Floating-point Divide:Example 4.3100 x 10 4 ÷ 2.9400 x 10 2 = (4.3100 ÷ 2.9400) x 10 (4-2) = 1.46598… x 10 2

39 Chapter 2 - Data Representation in Computer 39 240-208 Fundamental of Computer Architecture จบ บทที่ 2


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