1. Data Representation By- Mr. S. S. Hire

2. Data Representation

3. Selection Criteria  In selecting a number representation to be used in a computer, the following factors should be taken into account. 1.The number types to be represented. 2.The range of values(number magnitudes) likely to be encountered. precision 3.The precision of the numbers, which refers to the maximum accuracy of the representation. 4.The cost of the hardware required to store and process the numbers.

4. Scalar Data Types 1.Fixed point numbers: - - Fixed point numbers come in lengths of 1,2,4 or more bytes. - Fixed point formats allow a limited range of values. - Require relatively simple hardware. - Fixed point numbers are represented in two forms: 1.Unsigned integer. (represents +ve integers) 2.Signed integer.

5. Fixed Point Numbers Signed Integers: - Signed Integers: - Techniques to represent signed integer numbers are: - 1.Sign-magnitude representation. 2.1’s complement. 3.2’s complement.

6. Why 2’s complement 1.The addition of 1’s complement numbers is complicated by the fact that a carry bit from the most significant magnitude bit x n-2 must be added to the least significant bit position x 0. 2.Unique representation for Zero (0).

7. Floating point Numbers Scientific Notation permits us to represent such numbers using relatively few digits. Floating point numbers allow a much larger range of values Require either costly processing hardware or lengthy software implementation It is used in scientific computations. Three numbers are associated with a floating point number- 1)A mantissa M 2)An exponent E 3)And a base B i.e. M*B E

8. 32 bit (Single Precision) representation Sign – 1 bit Exponent -8 bits Mantissa – 23 bits

9. 32 bit (Single Precision) representation Instead of signed Exponent – the value actually stored in the exponent field is E’ = E(Scaling factor) + bias In 32 bit Bias is 127. 0 and 255 end values of E’ used to indicate the floating point values of exact zero and infinity respectively. 0 < E’< 255 E range is -126 <= E <=127

10. 64 bit - Double Precision representation

11. It occupies two 32 bit words. The 64 bits are divided into 3 fields – Sign – 1 bit Exponent – 11 bits Mantissa – 52 bits E’= E + 1023 where bias = 1023 E’ = 0 < E’ < 2047 E range -1022 <= E <= 1023

12. Booth’s Algorithm Booth algorithm. A technique that works equally well for both negative and positive multipliers called the Booth algorithm. The Booth algorithm generates a 2n-bit product. It treats both positive and negative 2’s complement n-bit operands uniformly. It has 3 attractive features: 1.It handles both positive and negative multipliers uniformly. 2.It achieves some efficiency in the number of additions required when the multiplier has a few large blocks of 1s. 3.On average, the speed of doing multiplication with the Booth algorithm is the same as with the normal algorithm.

13. Booth’s Algorithm : Flowchart

14. Booth’s Algorithm 1.Load AC=0, Q -1 = 0, M=Multiplicand, Q=Multiplier, Count=n. 2.Check the status of Q 0 Q -1 if Q 0 Q -1 =10 perform AC = AC – M if Q 0 Q -1 =01 perform AC = AC + M 3.Perform Arithmetic shift right: AC, Q, Q -1 4.Decrement sequence counter if not zero, repeat step 2 through 4. 5.The final result will appear in AC and Q registers. 6.Stop.

15. CPU organization

17. Additional Features  Most recent CPUs contain following extensions which improves their performance and ease of programming. 1.Multipurpose register set for storing data and addresses. AC, DR, AR are replaced by register file which is multipurpose. 2. Additional data, instruction and address types. supports several different word sizes and formats. Call and return instructions are added which simplifies program design.

18. Additional Features 3.Status Register- - Register to indicate computation status. - Indicates infrequent or exceptional conditions. - Also indicates the user and supervisor states. - Conditional branch instructions test the status register. 4.Program control stack. - SP keeps track of the stack’s entry point. - A part external memory is used as push-down stack memory.

19. Pipelining Speed up Techniques, instruction level parallelism Parallelism may be present in DPU, overlapping carried out by DPU or PCU

20. RISC PROCESSORS RISC? RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. History The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s. The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all designed with a similar philosophy which has become known as RISC. Certain design features have been characteristic of most RISC processors: – one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING – pipelining: a techique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions; – large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory

22. RISC Attributes Extensive instructions. Complex and efficient machine instructions. Microencoding of the machine instructions. Extensive addressing capabilities for memory operations. Relatively few registers. In comparison, RISC processors are more or less the opposite of the above: Reduced instruction set. Less complex, simple instructions. Hardwired control unit and machine instructions. Few addressing schemes for memory operands with only two basic instructions, LOAD and STORE Many symmetric registers which are organised into a register file.

23. RISC Disadvantages There is still considerable controversy among experts about the ultimate value of RISC architectures. Its proponents argue that RISC machines are both cheaper and faster, and are therefore the machines of the future. However, by making the hardware simpler, RISC architectures put a greater burden on the software. Is this worth the trouble because conventional microprocessors are becoming increasingly fast and cheap anyway?

24. What is CISC? CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory. Since the earliest machines were programmed in assembly language and memory was slow and expensive, the CISC philosophy made sense, and was commonly implemented in such large computers as the PDP-11 and the DECsystem 10 and 20 machines. Most common microprocessor designs such as the Intel 80x86 and Motorola 68K series followed the CISC philosophy. But recent changes in software and hardware technology have forced a re-examination of CISC and many modern CISC processors are hybrids, implementing many RISC principles.

26. CISC Attributes The design constraints that led to the development of CISC (small amounts of slow memory and fact that most early machines were programmed in assembly language) give CISC instructions sets some common characteristics: Variable length instructions where the length often varies according to the addressing mode Instructions which require multiple clock cycles to execute. E.g. Pentium is considered a modern CISC processor