1. TLA6000 Series Logic Analyzer Fact Sheet Breakthrough solutions for real-time digital systems analysis Featuring:  iCapture™ eliminates messy double probing of signals  iView™ time-correlated digital-analog view to clearly see how analog anomalies affect your digital signals  Up to 450 MHz state acquisition provides analysis of high-speed synchronous digital circuits  500 ps (2 GHz) with 128 Mb timing record length to capture intermittent events over a wide time window  125 ps-resolution MagniVu™ acquisition simultaneous with timing or state acquisition to find elusive timing problems quickly, without double probing  Automated drag-and-drop measurements ensure faster setup and analysis for common tasks  Drag-and-drop triggers simplify the task of isolating problems and data of interest A Comprehensive Signal Integrity Toolset at an Unprecedented price FeaturesBenefits Comprehensive Signal Integrity Debug Toolkit with: Glitch Trigger, Capture and DisplayQuickly find signal integrity problems by triggering on common problems such as crosstalk and termination errors. Exclusive glitch display removes need to manually search all channels by showing both the time and channel where any signal integrity problems occurred iCapture™ multiplexingEliminate double probing and see both digital and analog acquisitions through a single logic analyzer probe iView™ displayGain complete system visibility with time-correlated, integrated analog and digital data on one display Performance and Ease to debug digital systems MagniVu™ acquisitionAccurately determine signal relationships with high sampling resolution (125 ps) on all channels Automated measurementsEasily summarize your design’s performance with sophisticated measurements such as: frequency, period, pulse width, duty cycle, and edge count Drag & drop triggersQuickly isolate events through simple and intuitive trigger setup. Triggers include: Channel Edge, Channel Value, Bus Value, Multi-Group Value, Glitch, Setup and Hold Violation, or Trigger on Anything

2. Key ApplicationsBenefits  FPGA  Easily measure signals inside Altera or Xilinx FPGA designs and select which group of internal signals to probe without having to recompile  Processor and Bus Debug and Verification  View complete operation of today’s complex designs: physical layer, timing, bus transactions and software execution.  Signal integrity  Find elusive glitches and events with MagniVu™ acquisition’s high speed timing resolution of up to 20 ps Key specifications and ordering information TLA6000 Series Logic Analyzer Fact Sheet © 2011 Tektronix 52W-25757-2 2/11 JS/WOW Models Channels (per module) State Clock Rate Record Length (Full CH) Timing (Qtr/Half/Full CH) Timing (MagniVu™ acquisition) TLA620268 235 MHz (std) 450MHz (opt) 2Mb (std), 8Mb, 32Mb, 128Mb 500 ps / 1 ns / 2 ns125 ps TLA6203102 235 MHz (std) 450MHz (opt) 2Mb (std), 8Mb, 32Mb, 128Mb 500 ps / 1 ns / 2 ns125 ps TLA6204136 235 MHz (std) 450MHz (opt) 2Mb (std), 8Mb, 32Mb, 128Mb 500 ps / 1 ns / 2 ns125 ps Key Options Must choose one of the following probe options Opt. 1PAdd full complement of P6810 34- channel general-purpose probes Opt. 2PAdd full complement of mictor probes Opt. 3PAdd full complement of P6960 34- channel DMAX probes Opt. 18Add Touchscreen Opt. 1CAdd iView™ external oscilloscope interface kit Opt. 1SIncrease to 8 Mb base record length per channel Opt. 2SIncrease to 32 Mb base record length per channel Opt. 3SIncrease to 128 Mb base record length per channel Opt. 45Increase to 450MHz State Speed Opt. AMEnable Full Analog Multiplexer Opt. R55 year repair service plan Recommended Accessories PG3LDigital pattern generator in a separate chassis LACARTAccessory Cart 650-4815-xxAdditional Removable Hard Drive Assembly (No SW) 196-3494-xxFlying Leadset for P6960 Probe 196-3472-xx8-Ch Differential Leadset for P6810