1. Uni-Heidelberg, KIP, V.Angelov 1 International Workshop TRDs – Present & Future 24-28 September, Romania Wafer Tester, Optical Link, GTU V. Angelov Kirchhoff Institute for Physics Chair of Computer Science University Heidelberg, Germany Phone: +49 6221 54 9812 Fax:+49 6221 54 9809 Email:angelov@kip.uni- heidelberg.deangelov@kip.uni- heidelberg.de WWW:www.ti.uni-hd.de

2. Uni-Heidelberg, KIP, V.Angelov 2 Wafer tester Test automatically the TRAP on the wafer: The supply currents The serial links and pretrigger All internal parts using the CPUs The parallel output The half of the ADCs using a sin wave generator

3. Uni-Heidelberg, KIP, V.Angelov 3 Wafer tester status Contact problems with the needle card: The termination resistors in the LVDS input cells normally are about 100 Ohm, but with the contact resistance we get sometimes 150, 250, 500, even kiloohms. More frequently this happens with the SCSN inputs than with the clock and the pretrigger More overdrive doesn‘t help, disconnecting and connecting the chip again gives another resistance New needle card delivered last week Next steps: clean and align the needle card and try again, in case of problems mount the new needle card The positioning precision of the wafer tester improved, which is important for the burning of the chip ID with the laser

4. Uni-Heidelberg, KIP, V.Angelov 4 Optical Link Transmitter board to be plugged on the ROB  8 Bit at 120 MHz DDR parallel to 16 bit SDR 120 MHz conversion using CPLD  Commercial gigabit serializer from Texas Instruments TLK2501  Driver for the laser diode with programmable parameters via I2C interface Receiver board for testing of the gigabit transmitter board  Amplifier for the photodiode  The same commercial gigabit deserializer from Texas Instruments The link is stable at 2.4 GBits/s with pseudorandom data generated in the TI chip. To do: 1) send TRAP data; 2) store the received data via ACEX board in a PC

5. Uni-Heidelberg, KIP, V.Angelov 5 GTU – Track Matching Unit (TMU) 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver 850 nm SFP-Transceiver FPGA (Xilinx XC4VFX40 FF1152) FPGA (Xilinx XC4VFX40 FF1152) CompactPCI Bus Custom LVDS I/O 72 Pairs DDR2 SRAM JTAG 4 MB (6U Height, Single Width) 3 Parallel Links (120 MHz DDR, 8 Bit LVDS) From Left TMU To Right TMU To SMU Board 12 Fibre Optical Serial Links (2.5 GBit/s) From 1 Detector Stack Virtex-4 FPGA: 42k LCs, 448 I/Os, 12 Internal Multi- Gigabit Serializer/Deseriali zer-Units DDR2 SDRAM 128 MB Config PROM DDR2 SRAM: High Bandwidth (28.8 GBit/s) Data Buffer Jan de Cuveland

6. Uni-Heidelberg, KIP, V.Angelov 6 DDL - Source Interface Unit (SIU) Detector Control System (DCS) Board GTU – SMU Concentrator Board TTC RJ45 850 nm SFP-Transceiver CompactPCI Custom LVDS I/O JTAG (6U Height, Double Width) FPGA (Xilinx XC4VFX40 FF1152) FPGA (Xilinx XC4VFX40 FF1152) DDR2 SRAM 4 MB DDR2 SDRAM 128 MB Config PROM 850 nm SFP-Transceiver 5 Parallel Links (120 MHz DDR, 8 Bit LVDS) Trigger Out From TMU 0 From TMU 1 From TMU 2 From TMU 3 From TMU 4 ALICE Detector Data Link (DDL) ALICE Timing, Trigger & Control Input (TTC) Ethernet: System Configuration and Control Jan de Cuveland

7. Uni-Heidelberg, KIP, V.Angelov 7 GTU – TMU Current Status ♦ Final PCB layout steps in progress ♦ Prototype FPGA design: complete and verified ♦ Next steps: assemble and test... TMU/SMU PCB Layout Jan de Cuveland

8. Uni-Heidelberg, KIP, V.Angelov 8 Open questions ♦ Wavelength: 850 nm or 1300 nm ? Price comparison of the components (laser diode, SFP modules, cables)… Reliability of the link over longer distances and many connections: 1300 nm is typically specified for 2000m while 850 nm for 150-300m ♦ Clock quality, PLL or low jitter quartz oscillator + resynchronization in the CPLD On the serializer side we need 1/20 of the serial bit rate with jitter < 40 ps On the receiver side we need 1/10 of the serial bit rate with jitter < 25 ps ♦ Test with FPGA Virtex II as receiver (board from Mannheim) ♦ Stability with longer optical cables and the patchpanels with both wavelenghts