1. Copyright 2007 Sun Microsystems, Inc SNZI: Scalable Non-Zero Indicator Yossi Lev (Brown University & Sun Microsystems Laboratories) Joint work with: Faith Ellen (University of Toronto) Victor Luchangco and Mark Moir (Sun Microsystems Laboratories)

2. Presence Indicator Threads Arrive and Depart a room Query: Is there anybody in there? Room

3. 01 Simple Solution: Counter Threads Arrive and Depart a room Query: Is there anybody in there? Problem: Not Scalable 210 Counter

4. Simple Solution: Counter Problem: Not Scalable –Arrive/Depart nonscalable –Query nonscalable Observation: Counter Semantics too strong –Answers: how many threads in room –All we asked: are there any threads in room Task: Exploit weaker semantics to develop A Scalable Non-Zero Indicator (SNZI)

5. SNZI Specification State: –Surplus: a nonnegative integer Operations: –Arrive: increment surplus –Depart: decrement surplus –Query: return whether surplus ≠ 0 Well Formedness: Surplus ≥ 0

6. Solution’s Requirements Linearizable Lock Free Query reads a 1-bit indicator in a given word –Update using LL/SC Captures modifications by the outside world (spurious failures) –Scalability: Minimize modifications to indicator bit

7. Agenda Two SNZI solutions –Base solution: Separate indicator and surplus data (Query scalability) –Hierarchical solution: Implement one SNZI using the other (Arrive/Depart scalability) Applications Performance

8. Room Separate Surplus and Indicator: Naïve Attempt A simple counter and an indicator bit Set or UnSet bit after updating counter –0  1 transition: set the bit –1  0 transition: unset the bit 01 210 Counter Indicator

9. Room Separate Surplus and Indicator: Naïve Attempt A simple counter and an indicator bit Set or UnSet bit after updating counter What can go wrong? 01210 Counter Indicator Oh oh… I’m in the dark! Zzzz…

10. Separate Surplus and Indicator: Naïve Attempt A simple counter and an indicator bit Set or UnSet bit after updating counter What can go wrong? –Delay in setting bit causes unnoticed arrivals –Delay in unsetting bit causes obsolete writes

11. Separate Surplus and Indicator: Our solution 1. Add an “Announce” bit to the counter word: Says: “Indicator needed to be set” –Set announce on 0  1 transition –Clear announce after setting indicator –“Help” setting indicator if announce bit set

12. Room Separate Surplus and Indicator: Our solution 0121 0 false Counter & Announce bit Indicator 1. Add an “Announce” bit to the counter word: Says: “Indicator needed to be set” –Set announce on 0  1 transition –Clear announce after setting indicator –“Help” setting indicator if announce bit set

13. Room Separate Surplus and Indicator: Our solution 0121 1 true Counter & Announce bit Indicator 1. Add an “Announce” bit to the counter word: Says: “Indicator needed to be set” –Set announce on 0  1 transition –Clear announce after setting indicator –“Help” setting indicator if announce bit set Zzzz…

14. Room Separate Surplus and Indicator: Our solution 1. Add an “Announce” bit to the counter word: Says: “Indicator needed to be set” –Set announce on 0  1 transition –Clear announce after setting indicator –“Help” setting indicator if announce bit set 0121 2 true Counter & Announce bit Indicator Zzzz…

15. Room Separate Surplus and Indicator: Our solution 1. Add an “Announce” bit to the counter word: Says: “Indicator needed to be set” –Set announce on 0  1 transition –Clear announce after setting indicator –“Help” setting indicator if announce bit set 0121 2 false Counter & Announce bit Indicator Zzzz…

16. Room Separate Surplus and Indicator: Our solution 2. Prevent obsolete writes: Unset the indicator using LL/SC –Read counter in between, unset only if still 0 0121 1 false Counter & Announce bit Indicator

17. Room LL( ) Read Counter, If still 0 SC(, false) Separate Surplus and Indicator: Our solution 2. Prevent obsolete writes: Unset the indicator using LL/SC –Read counter in between, unset only if still 0 0121 0 false Counter & Announce bit Indicator Indicator wasn’t written in between Wasn’t written before LL

18. Hierarchical SNZI Base SNZI took care of Query Scalability Hierarchical SNZI: Arrive/Depart Scalability –Implement SNZI using a parent SNZI –Parent surplus > 0 iff a child surplus > 0 Arrange solution in tree Arrive/Depart at leaves, Query the root Base SNZI Hierarchical SNZI Filter

19. Hierarchical SNZI: The Basics Invariant: Parent surplus > 0 iff child surplus > 0 Similar to base SNZI, use a counter –0  1 transition triggers Arrive at parent –1  0 transition triggers Depart at parent –Help arriving at parent during 0  1 transition Unlike base SNZI –Use intermediate value ½ : 0  ½  1 –Parent is not a bit: it has a surplus Undo extra arrivals

20. Room Hierarchical SNZI 0 Counter Parent SNZI Surplus 0 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter

21. Room Hierarchical SNZI ½ Counter Parent SNZI Surplus 0 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½

22. Room Hierarchical SNZI ½ Counter Parent SNZI Surplus 1 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Try ½  1 transition

23. Room Hierarchical SNZI 1 Counter Parent SNZI Surplus 1 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Try ½  1 transition

24. Room Hierarchical SNZI ½ Counter Parent SNZI Surplus 1 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Try ½  1 transition

25. Room Hierarchical SNZI ½ Counter Parent SNZI Surplus 1 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Read Counter as ½: Help Arrive at Parent

26. Room Hierarchical SNZI ½ Counter Parent SNZI Surplus 2 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Read Counter as ½: Help Arrive at Parent Try ½  1 transition

27. Room Hierarchical SNZI 1 Counter Parent SNZI Surplus 2 Invariant: Parent surplus > 0 iff child surplus > 0 Increment Counter: 0  ½ Arrive at Parent Try ½  1 transition Undo: Depart at Parent Read Counter as ½: Help Arrive at Parent Try ½  1 transition Update counter for myself Only one succeeds: single contribution to parent per 0  1 1

28. Caveats Counter must have a version number –Avoid the ABA problem –Also in Base algorithm Undoing arrives at parent must happen after the executing Arrive incremented the counter –Helper defers undoing an Arrive operation until after incrementing the counter for itself –Otherwise indicator might “flicker” Detailed scenarios in the paper

29. Applications Hybrid Transactional Memory (ASPLOS 06) –HW and SW transactions run concurrently –HW transactions pay overhead for conflict detection with SW transactions –Avoid overhead if no SW transactions are running: Are there any SW transactions out there? –Query performance is important Executed by HW transactions

30. Read Indicators STM: Read Ownership Is any transaction reading this location? In addition: –Reset operation: All readers logically “disappear” New readers can arrive and depart before old readers departed Indicator should work as if old readers are not there –Needed because writer invalidate old readers

31. Room SNZI-R Added an Epoch to the indicator –Indicator set iff someone in room that arrived in the current epoch Operations: –Reset starts a new epoch –Arrive at current epoch –Depart at the epoch we arrived at –Query returns bit and current epoch Indicator 1975 Epoch 1975 Reset 2007

32. Room SNZI-R Added an Epoch to the indicator –Indicator set iff someone in room that arrived in the current epoch Operations: –Reset starts a new epoch –Arrive at current epoch –Depart at the epoch we arrived at –Query returns bit and current epoch Indicator 2007 Epoch 1975 2007

33. Evaluation System: 48-processor Sun Fire TM 6800 Experiment: –Visiting threads: keep arriving and departing. –Query thread: keeps querying the indicator. Various tree depths Measured: –Visit (Arrive+Depart) and Query throughput when varying #visiting threads Compared with a simple counter implementation

34. Performance: Query Scalability

35. Performance: Visiting Scalability

36. SuperSNZI: Simple counter with a SNZI indicator Arrive by modifying counter if not contended Use SNZI otherwise Depart accordingly

37. Performance: SuperSNZI SuperSNZI: Simple counter with a SNZI indicator Arrive by modifying counter if not contended Use SNZI otherwise Depart accordingly

38. Conclusion Presence indicator –Can be implemented using a simple counter –Counter semantics too strong  Doesn’t scale –Exploits the weaker semantics we need to provide SNZI: A Scalable Non-Zero Indicator Perform much better than a simple counter –Useful in practice

39. Thank You!