1. Derandomiser block E.Atkin, A.Kluev MEPhI,A.Voronin SINP MSU

2. Outline ► Core structure of derandomiser ► Specs expected ► Chip structure and layout

3. Analog readout architecture with derandomizer CSAShaper CMP CSAShaper CMP PDADC PDADC Input channel 0 Input channel n Digital input 0 Analog input 0 Analog input n Digital input n Output channel 0 Output channel m Address bus m Address bus 0 Crosspoint switch + Arbitration logic: n inputs, m outputs n>m Analog output 0 Analog output m busy Prototype

4. Arbitration ADCs ●●●●●● IN 1 IN 2 IN n ●●●●●● Comparators ●●●●●● Preamps + Shapers Address Crosspoint switch Analog storage devices (T&H or PD) Crosspoint switch architectures Multiple storages shared by channels

5. First prototype 4 x 2 X0, X1, X2, X3 – analog inputs, Y0, Y1 – cross-point switch outputs

6. What were simplified on the first prototype ► We do not think about cross talk, linearity, noise ► There are no drivers on the chip outputs ► Idea was to check derandomizer fuctionality ► We did not check the arbitration logic for infinity, when input signals have small delays or no delay ► Peak detector is not optimized for HOLD mode ► Cross-point switch is not optimized for capacitive load

7. Derandomizer chip (prototype1)

8. Layout of 4x2 derandomizer block

9. Test Board

10. Comparator Cload =1 pF 1us Cload =4 pF Cload =15 pF Cload =1 pF Cload =15 pF 1us  Colored – simulation  B/W – scope  1 – input  2 –output  3 – threshold level 1 1 11 1 1 1 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3

11. Peak Detector Cload =1 pFCload =4 pF Cload =15 pF 2.5 us Cload =15 pF  Colored – simulation  B/W – scope  1 – input  2 –output  3 – reset 1 1 1 1 1 1 2 22 2 2 2 3 3 33 3

12. Cross point switch Only one signal on the inputTwo signals on different time  1 - comparators  2 – inputs  3 – outputs 1 1 1 3 3 2

13. Cross point switch Small delay between two signalsTwo signals in the same time  1 - comparators  2 – inputs  3 – outputs 1 1 2 2

14. Cross point switch 4 Signals (4 comparators)2 cross-point switch outputs (with amplification)

15. Cross point switch 4 Signals ( 4 comparators)2 cross-point switch outputs and peak detectors

16. ► The prototype chip confirmed derandomizer functionality ► Schematics should be improved for signals, which can come in the same time (to avoid infinity on the cross-point switch outputs) ► Next prototype must get much less cross talk between channels and different parts of the chips ► To measure the real speed of the scheme the fast drivers should be included on the chip outputs ► Service low capacitance outputs better to measure with picoprobe, which is serious problem for us Comments