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1 A Feedback Control Architecture and Design Methodology for Service Delay Guarantees in Web Servers Presentation by Amitayu Das
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2 Introduction Response-time delay while browsing Implications – Loss for the website – Loss of revenue for the hosting platform, too Reasons - Server end problem - Network latency We’re talking about Server end problem
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3 Motivation Time-varying workload for limited resource Limited adaptation of web-server: best-effort Lack of enforcement of QoS guarantees at web-server Notion of service differentiation is not enforced at server end
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4 Differential service Two classes: premium, basic (say) – Best-effort model: no guarantee – Absolute model: soft deadline How to decide the deadline? Depends on several things No overload => all classes receive satisfactory delay Overload => degradation in prioritized order – Proportional model: no fixed deadline, hence flexible Performance differentiation is better than previous two – Hybrid model: Gets the best of above two Flexibility with no overload, bounded delay for high priority classes on overload
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5 Web server mechanism Scenario for web server – Handle incoming TCP connection by assigning a server – Multi-threaded/multi-process setup – Multi-threaded setup is very costly in UNIX HTTP 1.0: – Excessive # of concurrent TCP connection HTTP 1.1: – Persistent connection and problems with that Which is the bottleneck here?
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6 Service delay guarantees Connection delay: – Time b/w arrival and acceptance Processing delay: Time b/w arrival and transferring response to client Connection delay (C k (m)): average for class k (0 k N) within ((m-1)S, mS) Relative delay guarantee: C j (m)/C l (m) = W j /W l for all j and l (j ≠ l); W j is the relative desired delay Absolute delay guarantee: C j (m) W j ; for all classes j if there is a class l > j and C l (m) W l, which is desired (absolute) delay Hybrid delay guarantee: W k represents both desired delay and relative delay
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7 The Feedback-Control Architecture for Delay Guarantees
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8 Delay controllers Controller: (Reference, Output, Error, Control Input) (VS k, V k (m), E k (m), U k (m)) Absolute delay controller CA k : (W k, C k (m), VS K (m) – V k (m), B k (m)) Relative delay controller CR k : (W k /W k-1, C k (m)/C k-1 (m), VS K (m) – V k (m), B k-1 (m)/B k (m)) Hybrid delay controller - Switching condition: - C 0 (m) > W 0 + H, switch to CA; H is a threshold, to avoid - C 0 (m) > W 0 - H, switch to CR; thrashing b/w controllers
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9 Design of delay-controller Performance specification – Stability – Settling time (T S ):measures efficiency of controller – Steady state error (E S ): measures accuracy System Identification: establish dynamic model Root Locus: designs controller to meet performance specification
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10 Architecture for system identification System identification – Model structure – White noise input – LSE Estimated parameters – (a1, a2, b1, b2) = (0.74, -0.37, 0.95, - 0.12): relative delay – (a1, a2, b1, b2) = (0.08, -0.2, 0.2, -0.05): absolute delay
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11 System identification results for relative delay
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12 Results (relative delay)
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13 Results (absolute delay)
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14 Root Locus design g = 0.3, r = 0.05 for relative delay controller g = -4.6, r = 0.3 for absolute delay controller
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15 Evaluation of relative-delay guarantees
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16 Evaluation of relative-delay guarantees
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17 Evaluation of absolute-delay guarantees
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18 What self-* about it? Proposes adaptive architecture Avoids laborious ad-hoc approaches for tuning and design iteration
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19 Result with three classes
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20 Last slide Questions??
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