1. Chapter 2 Introduction to Computer Architecture and Assembly Language

2. Computer Architecture Interface between hardware and the lowest level of software Interface between hardware and the lowest level of software Assembly language programmer’s view of the processor Assembly language programmer’s view of the processor 3 major components of a computer 3 major components of a computer 1. CPU (Central Process Unit) 1. CPU (Central Process Unit) 2. Memory 2. Memory 3. I/O Devices 3. I/O Devices The components are interconnected by System Bus. The components are interconnected by System Bus.

3. Assembly Language A low-level, human-readable representation of the binary code executed by a computer. A low-level, human-readable representation of the binary code executed by a computer. A language that controls the primitive operations on binary data. A language that controls the primitive operations on binary data. Basic operations include data movement, addition, subtraction, comparison, shifting and branching. Basic operations include data movement, addition, subtraction, comparison, shifting and branching.

4. Computer Architecture - Languages Applications High Level Language Low Level language Hardware Assembly Language C, JAVA Word, Excel HHL  Complier Assembly Language  Assembler Machine Language

5. Von Neumann Machine (Stored Program Computer) The common memory system stores both the instructions and the data.The common memory system stores both the instructions and the data. Address Data Data path (Data bus) Address path (Address bus) Central Processor Unit (CPU) Memory Instruction Data

6. Memory Array of cells storing data (data/instructions), each cell has an unique addressArray of cells storing data (data/instructions), each cell has an unique address Address port, data port, control signals.Address port, data port, control signals. Read cycle: data at the specified memory address is placed on the data bus.Read cycle: data at the specified memory address is placed on the data bus. Write cycle: data on the data bus is written into the specified memory location.Write cycle: data on the data bus is written into the specified memory location. Address Data427 9 6 14 32 Address transferred from CPU Read Write 0000 0001 0002 Data transferred between CPU and memory

7. Central Processor Unit (CPU) Responsible for reading instructions from the memory and executing them.Responsible for reading instructions from the memory and executing them. Address path: used by CPU to provide memory address of instruction or data to the memory.Address path: used by CPU to provide memory address of instruction or data to the memory. Data path: used by CPU/memory to transfer data.Data path: used by CPU/memory to transfer data.

8. Basic von Neumann Instruction Format An instruction consists of operation code and the operand addressAn instruction consists of operation code and the operand address –Could have more than one addresses, later … Operation code (op-code): defines what the instruction does.Operation code (op-code): defines what the instruction does. Operand address (address): where the operand is located – referred to as the address fieldOperand address (address): where the operand is located – referred to as the address field Operation Code Operand address

9. Von Neumann machine in Pseudo code Module Von_Neumann I := 0 Repeat Fetch an instruction from memory location I I := I + 1 Execute the instruction Forever END Von_Neumann Von Neumann machine operates in a two-phase mode, fetch/execute cycles. Von Neumann machine operates in a two-phase mode, fetch/execute cycles.

10. Module Execute the instruction Decode the instruction IF instruction requires data, THEN Fetch the data from the memory END_IF Perform operation defined by instruction IF instruction requires data to be saved, THEN Save the data in memory END_IF End Execute the instruction Pseudo code for execution

11. Information Flow between CPU and Memory CPU C := A+B 5 6 11 Read Write A B C Instruction Memory

12. Arithmetic and logic unit (ALU): calculationArithmetic and logic unit (ALU): calculation Control unit (CU): interprets the instructionControl unit (CU): interprets the instruction CPU Components Address Data Data bus Address bus CPU Memory Instruction : Data : Control bus ALU CU Registers

13. Registers: temporary storageRegisters: temporary storage –Program counter (PC): holds the address of the next instruction to be executed. –Instruction register (IR): holds instruction –Data registers: hold data –Address registers: hold addresses –Condition code register (CCR): flag bits Updated to reflect operation resultUpdated to reflect operation result Used to change flow of programUsed to change flow of program –MAR, MBR, PSW, etc. (later) CPU Components

14. A simple language to describe the operations carried out by CPU.A simple language to describe the operations carried out by CPU. –We will use it to describe the function of instruction [4] or [M(4)] means the content of memory location 4.[4] or [M(4)] means the content of memory location 4. [M(6)] = 4 means the content of memory location 6 is the value 4.[M(6)] = 4 means the content of memory location 6 is the value 4. [M(6)] <- 4 means assigning the number 4 to the memory location 6.[M(6)] <- 4 means assigning the number 4 to the memory location 6. Register Transfer Language (RTL)

15. Assembly Language A form of the native language of a computer in whichA form of the native language of a computer in which - machine code instructions are represented by mnemonics - machine code instructions are represented by mnemonics e.g., MOVE, ADD, SUB e.g., MOVE, ADD, SUB - addresses and constants are usually written in symbolic form - addresses and constants are usually written in symbolic form e.g., NEXT, BACK_SP e.g., NEXT, BACK_SP

16. MC68000 Assembler Valid symbolic name contains up to 8 letters or number.Valid symbolic name contains up to 8 letters or number. Name starts with letter.Name starts with letter. TempVa123, TempVa127 are recognized as TempVa12 by assemblerTempVa123, TempVa127 are recognized as TempVa12 by assembler

17. Files Created by Assembler Binary file or object file is recognized by machine.Binary file or object file is recognized by machine. Listing file contains the information of program assembling.Listing file contains the information of program assembling. If a program written in more than one files, LINKER is needed to link the object files together before execution.If a program written in more than one files, LINKER is needed to link the object files together before execution. Source File Editor Assembler Listing File Binary File

18. Assembly Language Program Two types of statementsTwo types of statements 1. Executable instructions 1. Executable instructions 2. Assembler directives 2. Assembler directives Executable instructionExecutable instruction - translated into machine code by assembler - translated into machine code by assembler - tells the machine what to do at execution - tells the machine what to do at execution

19. Assembly Language Program Assembler directivesAssembler directives - tell assembler what to do when program assembled - tell assembler what to do when program assembled - are not translated into machine code, they are non-executable. - are not translated into machine code, they are non-executable. E.g., EQU, DC, DS, ORG, END E.g., EQU, DC, DS, ORG, END

20. Assembly Language Program Program written in 4 columns:Program written in 4 columns: [label] instruction [operand] [comment] [label] instruction [operand] [comment] - Label: begins in column 1 - Label: begins in column 1 programmer-defined programmer-defined reference to a line reference to a line $50 is 50 16, %10 is 00000010, 50 is 50 10.$50 is 50 16, %10 is 00000010, 50 is 50 10. Longword 32-bit, Word 16-bit, Byte 8-bit.Longword 32-bit, Word 16-bit, Byte 8-bit. A line begins with an ‘*’ in its first column is a comment -> ignored by the assemblerA line begins with an ‘*’ in its first column is a comment -> ignored by the assembler

21. Sample ProgramSample Program BACK_SP EQU $08ASCII code for backspace DELETE EQU $01ASCII code for delete CAR_RET EQU $0DASCII code for carriage return ORG $00400Data origin LINE DS.B 64Reserve 64 bytes for line buffer * Input a character and store it in a buffer ORG $001000Program origin LEA LINE,A2 NEXT BSR GET_DATA CMP.B #BACK_SP,D1 BEQ MOVE_LEFT CMP.B #DELETE,D1 BEQ CANCELL CMP.B #CAR_RET,D1 BEQ EXIT MOVE.B D1,(A2)+ BRA NEXT MOVE_LEFT LEA -1(A2),A2 BRA NEXT CANCEL LEA LINE,A2 BRA NEXT GET_DATA MOVE #5,D1 TRAP #15 RTS EXIT STOP #$2700 END

22. How Assembler Works Two-pass assembler Two-pass assembler - Source program scanned twice before producing the object code LC: Assembler’s simulation of PC LC: Assembler’s simulation of PC –When an assembly program is assembled, LC is used to keep track of the “memory location” at which an instruction would be should that instruction be executed. –So that machine code can be generated correctly from assembly code.

23. How Assembler Works Pass I: Pass I: - Search source program for symbol definitions and enter these into symbol table Pass II: Pass II: - Use symbol table constructed in Pass I and op-code table to generate machine code equivalent to source

24. Pass I (Simplified) START [LC] <- 0 Fetch Next Instruction END? PASS II Label? Add Label to Symbol Table w/ [LC] as its value Increment [LC] Accordingly Y N Y N

25. Pass II (Simplified) START [LC] <- 0 Fetch Next Instruction END? STOP Increment [LC] Accordingly Y N Op-code Lookup Symbol Table Lookup Generate Machine Code

26. Example Example 1 OPT CRE 2 00000019 A: EQU 25 3 00001000 ORG $1000 4 00001000 00000004 M: DS.W 2 5 00001004 00001008 N: DC.L EXIT 6 00001008 2411 EXIT: MOVE.L (A1),D2 7 0000100A 139A2000 MOVE.B (A2)+,(A1,D2) 8 0000100E 06450019 ADDI.W #A,D5 9 00001012 67000008 BEQ DONE 10 00001016 90B81004 SUB.L N,D0 11 0000101A 60EC BRA EXIT 12 0000101C 4E722700 DONE: STOP #$2700 13 00001000 END $1000 Lines: 13, Errors: 0, Warnings: 0. SYMBOL TABLE INFORMATION Symbol-name Type Value Decl Cross reference line numbers A EQU 00000019 2 8. DONE LABEL 0000101C 12 9. EXIT LABEL 00001008 6 5, 11. M LABEL 00001000 4 * * NOT USED * * N LABEL 00001004 5 10. LC Machine Code What we care in the symbol table Assembly Code

27. EQU (EQUate) Link a name to a value The code doesn’t need modified, even if the length and the width changed,The code doesn’t need modified, even if the length and the width changed, It tells reader how the Area is computed.It tells reader how the Area is computed. LengthEQU30 WidthEQU25 AreaEQULength*Width

28. ORG (ORiGin) Sets up value of location counter (LC)Sets up value of location counter (LC) LC: Assembler’s simulation of PCLC: Assembler’s simulation of PC

29. DC (Define a Constant) Define and initialize a variable Qualified by.B,.W, or.L (byte, word, or longword) Loads constant into the memory in hexadecimalLoads constant into the memory in hexadecimal A 16-bit word should not be stored across the even boundary, e.g. at 1001A 16-bit word should not be stored across the even boundary, e.g. at 1001 ORG $00001000 FIRST DC.B 10,66 DC.L $0A1234... 0A0A0A0A42 12 34 00 0A0A0A0A 001001 001003 001005 001000 001002 001004 Memory Map : : :

30. Demonstration * The memory is addressable by byte, but * the data is fetched in word, 16 bits. ORG$1000 FIRSTDC.B10,66 SECONDDC.B20 DATADC.L$ABCD STOP#$2700 END$1000 >md 1000 001000 0A 42 14 00 00 00 AB CD 4E 72 27 00 00 00 00 00.

31. DS (Define Storage) Reserves (allocates) storage location in memory Similar to DC, but no values stored DC: set up values in memory locations DS: reserve memory space for variables Example on page 68

32. ORG $001000 TABLE DS.W 256 POINTER_1 DS.L 1 VECTOR_1 DS.L 1 INIT DC.W 0,$FFFF … ORG $018000 ENTRY LEA ACIAC,A0 MOVE.B #SETUP1,(A0) POINTER_1 01000 011FF 01200 01201 01202 01203 01204 01205 01206 01207 01208 01209 0120A 0120B 0120C 18000 18001 TABLE VECTOR_1 INIT ENTRY 00 FF 41 F9 Example

33. END End of program

34. More on Instruction Format An instruction is an op-code followed by address(es) An instruction is an op-code followed by address(es) – Address means any address in system General Instruction Formats General Instruction Formats Four-address format – Four-address format [Op-code | Src1 | Src2 | Dst | NextInstr] x = y + z Src1: y, Src2: z, Dst: x

35. More on Instruction Format General Instruction Formats (Cont’d) General Instruction Formats (Cont’d) Three-address format – Three-address format [Op-code | Src1 | Src2 | Dst] Use program counter for next instruction Two-address format – Two-address format [Op-code | Src1 | Src2 (and Dst)] x = y + x Src1: y, Src2 and Dst: x 68000 uses two-address format

36. More on Instruction Format General Instruction Formats (Cont’d) General Instruction Formats (Cont’d) – One-address format [Op-code | Src1] Accumulator (AC) is Src2 and DST [AC] = [AC] + y – Zero-address format [Op-code] Use stack Post-order expression

37. Example I = J + K I = J + K Four-address format – Four-address format ADD J, K, I, NEXT ; I = J + K ; next instruction in location NEXT ; next instruction in location NEXT Three-address format – Three-address format ADD J, K, I ; I = J + K ; next instruction in PC ; next instruction in PC Two-address format – Two-address format MOVE J, I ; I = J ADD K, I ; I = K + I How about: ADD K, J MOVE J, I

38. Example I = J + K I = J + K – One-address format LOAD J ; AC = J ADD K ; AC = J + K STORE I ; I = AC Zero-address format, postfix: I = JK+ – Zero-address format, postfix: I = JK+ LOAD J ; push J onto stack LOAD K ; push K onto stack ADD ; pop and add J and K, result on top STORE I ; pop stack top to I

39. More Examples I = J + K + L I = J + K + L I = J + K * L I = J + K * L I = (J + K) * L I = (J + K) * L I = (J + K) * L – M I = (J + K) * L – M I = J + K * L – M I = J + K * L – M I = J + K * (L – M) I = J + K * (L – M) I = (J + K) * (L – M) I = (J + K) * (L – M)