0. A 60-GHz CMOS Direct-Conversion Wireless Transceiver
2007/10/29
A 60-GHz CMOS Direct-Conversion Wireless Transceiver
Ryo Minami
Advisor: Kenichi Okada
Co-Advisor: Akira Matsuzawa
Tokyo Institute of Technology, Japan
Thank you very much for giving me a chance to present.
Thank you for your kind introduction.
Today I would like to present "A 60-GHz CMOS Direct-Conversion Wireless Transceiver".
My name is Ryo Minami, from Tokyo Institute of Technology, Japan.

1. Outline Motivation RF Front-end Measurement and Comparison Conclusion
60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL)
60GHz transmitter(Tx)
60GHz receiver(Rx)
Measurement and Comparison
Conclusion
This is the outline of my presentation.
First, I'll start with the research motivation and target.
Then, I‘ll talk about RF front-end design about Local oscillator, transmitter, and receiver for 60GHz wireless communication.
Next, I’ll show the measurement result and performance comparison.
Finally, I’ll conclude this presentation.

2. Outline Motivation RF Front-end Measurement and Comparison Conclusion
60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL)
60GHz transmitter(Tx)
60GHz receiver(Rx)
Measurement and Comparison
Conclusion
First, I’ll talk about the motivation of my research.

3. Motivation
60GHz CMOS direct-conversion transceiver for multi-Gbps wireless communication
IEEE ad specification
57.24GHz GHz
2.16GHz/ch x 4channels
QPSK  3.5Gbps/ch
16QAM  7Gbps/ch
Now, 60GHz wireless communication has become a very important research target, because it is capable of multi-Gbps wireless communication.
According to the IEEE standard, there is about 9GHz of available frequency bandwidth.
It is separated into 4 channels, and each channel has 2.16GHz of bandwidth.
By using this 2.16GHz, we can realize 3.5Gbps in QPSK and 7Gbps in 16QAM.
This is a very big motivation to use the 60GHz carrier frequency.
Moreover, the attenuation is occurred by the absorption of oxygen molecule at 60GHz, therefore 60GHz is resistant to interfere.
So our group have been researching mmW wireless communication for a long time.

4. Challenges for mmW Transceivers
Target
a low-power direct-conversion RF front-end with 4-channel coverage
very low phase noise
Design complexity
2.4GHz vs 60GHz (25x)
20MHz-BW vs 2.16GHz-BW (108x)
Our research target is to realize direct-conversion RF front-end which is advantageous in terms of power consumption and chip area.
One of the most severe performance requirements is the phase noise of local synthesizer.
Basically, 20dB better performance is required as compared with the conventional 60GHz PLLs.
As comparing to 2.4GHz carrier frequency, which is used in wireless local area network, 60GHz band is heavily affected by parasitic components, such as capacitance and inductance.
Moreover, according to IEEE standard, each channel has 2.16GHz bandwidth.
This is the one hundred and eight times as wide as wireless LAN.
So it is very difficult to design 60GHz oscillator which covers all channels and at the same time has good phase noise.

5. Phase Noise Requirement
For 16QAM direct-conversion, is required.
AM-AM of PA
16QAM
QPSK
D Required CNR [dB]
Phase noise 1MHz offset
Here, I’ll explain the phase noise requirement for 16QAM.
This graph shows the required CNR at the receiver side for a BER of 10 to the power of -6.
This simulation considers the entire circuit blocks including baseband signal processing.
In this case, I only consider the non-ideality of local synthesizers and power amplifier, and all the other parts are assumed to be ideal.
Basically, the non-ideality increases the required CNR.
In this graph, Y axis shows the increase of the required CNR, and x axis shows the phase noise at 1MHz-offset frequency.
For QPSK, there is no big degradation due to phase noise.
However, 16QAM is heavily influenced.
From this figure, it is clear that phase noise is required to achieve 16QAM wireless communication in direct-conversion architecture.

6. LO Topologies 1 Poor Phase Noise I/Q mismatch 60GHz QVCO[1]
Low Q for capacitors
30GHz push-push VCO[2]
2nd harmonic
90 degree hybrid
Poor Phase Noise
90 degree hybrid
For direct-conversion transceiver, quadrature synthesizer is required.
There are several methods to realize it, and one of the most common methods is to use doubled-frequency oscillator and frequency divider.
However, this method requires a 120GHz oscillator and it is infeasible.
Although use of quadrature oscillator is also common, power-loss resulting from skin-effect is very large at 60GHz and the phase noise will be degraded.
According to the circuit in reference [1], it only has a phase noise of -75dBc/Hz at 1MHz-offset frequency even though a phase noise of -90dBc/Hz is required.
The circuit in reference [2] uses a 90 degree hybrid with a 30GHz push-push oscillator.
However, I/Q mismatch is a headachy problem for this kind of circuit topology.
I/Q mismatch
[1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009

7. Proposed Topology
20GHz PLL + 60GHz Quadrature Injection Locked Oscillator
Good tradeoff between phase noise & tuning range
Target : 20dB improvement of phase noise
So, in this work, I use a 60GHz quadrature injection-locked oscillator with a 20GHz PLL.
By using the injection-locking technique, basically the phase noise is determined by the 20GHz PLL.
So our target is to realize excellent phase noise which is offset.

8. Outline Motivation RF Front-end Measurement and Comparison Conclusion
60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL)
60GHz transmitter(Tx)
60GHz receiver(Rx)
Measurement and Comparison
Conclusion
Then I’ll talk about the RF component which are 60GHz local oscillator, 60GHz transmitter, and 60GHz receiver.

9. Block Diagram Tx : 4-stage PA, Active mixer,
This is the entire block diagram.
The RF front-end employs a direct-conversion architecture.
A wide frequency coverage and low phase-noise performance is required for local oscillator.
It consists of a 20-GHz PLL and a 60-GHz quadrature injection-locked oscillator.
In the RF part, the upper side is a receiver, and the lower side is a transmitter.
Tx : 4-stage PA, Active mixer,
Rx : 4-stage LNA, Passive mixer
LO : 60GHz ILO, 20GHz PLL

10. 60GHz Quadrature LO 36MHz ref. 20GHz PLL 60GHz QILO PFD CP LPF
(27,28,29,30) 5
4 CML
This is the block diagram of the 60GHz quadrature local synthesizer.
According to the IEEE standard, there are 4 channels, and the carrier frequencies are 58.32GHz, 60.48GHz, 62.64GHz and 64.80GHz.
For the 60-GHz oscillator, this 7-GHz frequency tuning range is not so easy to be covered.
In addition, there is a trade-off between phase noise and frequency tuning range, and at least a phase noise of -90dBc/Hz is required for direct-conversion transceivers.
So, in this work, we use a 60-GHz quadrature injection-locked oscillator with a 20-GHz integer-N PLL.
This oscillator has a quadrature configuration, so we can always obtain quadrature outputs, I and Q.
The 20GHz signal is injected into the 60GHz quadrature injection-locked oscillator.
The phase noise of the injection-locked oscillator is basically determined by that of the 20GHz PLL.
The frequency of 20GHz is very good for obtaining a wide frequency tuning range and good phase-noise performance.
As a result, we can obtain a good phase noise performance at 60GHz with a wide frequency range.
Wide frequency tuning range
Phase noise improvement by injection locking

11. Quadrature Injection Locked Osc.
20GHz
This is the schematic of the quadrature injection locked oscillator.
This 60-GHz quadrature injection locked oscillator works as a frequency tripler following with the 20-GHz PLL.
It consists of two LC tanks, and the I- and Q- oscillators are connected to each other through tail transistors.
This I-Q cross coupling causes an increase of parasitic capacitance and inductance, which reduce the oscillation frequency and tuning range.
So, in this work, we employ a back-to-back layout structure of active part to widen the frequency tuning range, we achieve the full 4-channel coverage with a phase noise of less than -95dBc/Hz at 1MHz offset frequency.
20GHz
60GHz QILO works as a tripler with 20GHz PLL.
Full 4-channel coverage is realized with <

12. Phase noise -95dBc/Hz@1MHz-offset has been realized in all channels.
62.64[GHz]
Ch4:
64.80[GHz]
Ch1:
58.32[GHz]
Ch2:
60.48[GHz]
This is the measurement result of the phase noise.
In this work, has been realized for all channels.
Due to this improvement, 16QAM wireless communication using direct-conversion architecture can be realized.
has been realized in all channels.

13. Performance comparison（60GHz PLL）
Target
This Work
(PLL+QILO)
[1]
(60GHz QVCO)
[2]
(30GHz VCO
+90o hybrid)
fref[MHz] -
36.0
100.0
117
VCO range
[GHz]
58.3 ~ 64.8
57.8 ~ 65.0
57.0~66.0
59.6~64
Phase noise
@1MHz[dBc/Hz]
<90.0
-96.3
-75.0
-72.3
Power
[mW]
106.3
78.0
63.1
Output type
Quadrature
This is the performance comparison of LO synthesizers.
Compared to the conventional quadrature oscillators, this work realizes an excellent phase noise of
Moreover it covers every carrier frequency in the 60GHz-band.
In this work, transmitter and receiver are also implemented, wireless communication test will be explained in the following slides.
[1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009

14. Tx Blocks 4-stage PA MIM TL to antenna Up-conversion mixer from BB I/Q
Next, I'll talk about transmitter design.
This is a 4-stage power amplifier and an up-conversion mixer.
At 60GHz, the size of devices is not negligible compared to wavelength.
So in this work, a transmission-line based design is employed for improving simulation accuracy.
The low-loss transmission line has a 0.8dB/mm insertion loss, and the characteristic impedance is around 50 ohms.
The MIM transmission line is used as a distributed-constant decoupling device since there is no ideal lumped-constant capacitor at 60GHz.
capacitive cross-coupling [3]
from LO
[3] W. Chan, et al., JSSC 2008

15. Rx Blocks 4-stage CS-CS LNA from antenna Down-conversion mixer from LO
ESD protection
from antenna
W=1mm x40
1mm x40
2mm x20
2mm x20
Down-conversion mixer
from LO
This is a 4-stage low noise amplifier.
The 1st and 2nd stage transistors use a 1um finger width for noise optimization.
Actually, the 2nd stage still has a large noise contribution at millimeter frequency range, so we employed a common-source common-source topology instead of a cascode topology to improve noise figure.
The 3rd and 4th stage transistors have a 2um finger width for gain optimization.
The input matching block has a shunt-grounded structure for ESD protection.
The down-conversion mixer is a passive one.
A parallel-line transformer is used for a single-to-differential conversion.
The mismatch of the transformer is compensated by a differential amplifier with high common-mode rejection realized by matching blocks and capacitive cross-coupling.
The baseband differential amplifier has a gain-peaking load to maintain gain flatness.
Parallel-line trans.
to BB I/Q

16. Outline Motivation RF Front-end Measurement and Comparison Conclusion
60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL)
60GHz transmitter(Tx)
60GHz receiver(Rx)
Measurement and Comparison
Conclusion
Next I’ll show measurement results of wireless communication test and performance comparison.

17. Die Photo 65nm CMOS Tx:1.96mm2 Rx:1.77mm2 PLL:1.37mm2 Logic:0.38mm2
LNA
65nm CMOS
Tx:1.96mm2
Rx:1.77mm2
PLL:1.37mm2
Logic:0.38mm2
This slide shows the die photo.
The RF chip is implemented by a standard 65nm CMOS technology.
The chip size is 4.2mm square.
In this chip, the upper side is the receiver, and the lower side is the transmitter.
The center part is the 20GHz PLL and Logic.

18. RF Measurement Setup Rx I/Q output (Rx) Tx I/Q input (Tx)
with VSA 89600
DC supply Rx
I/Q output (Rx)
6-dBi antenna
This is the measurement setup for the RF front-end.
The RF chip is implemented in a package, and two 6-dBi antenna are embedded in the package for the Tx and Rx.
It's a kind of waveguide antenna.
In the measurement setup, the left side is used as transmitter, and the right side is used as a receiver.
An arbitrary waveform generator is used to generate a modulated signal, and a digital oscilloscope is also used to evaluate error vector magnitude performance with vector signal analyzer. Tx
I/Q input (Tx)
16.3mm x 14.4mm
DC supply
[4] R. Suga, et al., EuMC 2011

19. 7.0Gb/s 16QAM (max 10Gb/s) Channel ch.1 ch.2 ch.3 ch.4 Constellation
Max rate
Constellation
Spectrum
Data rate*
7.0Gb/s
10.0Gb/s
(ch.3)
EVM**
-23.0dB
-23.3dB
-22.8dB
-23.0dB (ch.3)
Distance***
0.3m
0.5m
>0.01m (ch.3)
This table shows measured constellation, spectrum, data rate, EVM, and maximum communication distance for channel 1-to-4.
The spectrum has a 2.16GHz bandwidth, and satisfies the spectrum mask defined in the IEEE standards.
The raw data rate is 7.04Gb/s for 16QAM modulation scheme, which is the theoretical maximum value within the 2.16-GHz bandwidth of the IEEE standards.
And it can be extended up to 10Gb/s with a wider frequency bandwidth.
The EVM is -23dB.
It meets the theoretical lower limit of 16QAM wireless communication which is -17dB.
*The roll-off factor is The bandwidth is 2.16GHz except for Max rate.
**EVM through Tx and Rx boards.
***Maximum distance within a BER of The 6-dBi antenna in the package is used.

20. Performance Comparison
Arch.
Max. rate in 16QAM
Distance for BER <10-3
PDC (Tx/Rx)
IMEC[5]
Direct
7Gb/s
ch.1-4(EVM < -17dB)
(not wireless)
176mW
/112mW
(w/o PLL)
CEA-LETI[6]
Hetero
3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
1,357mW
/ 454mW
SiBeam
[7]
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
1,820mW
/ 1,250mW
This work
10Gb/s
ch.1-4 (EVM < -23dB)
m (QPSK)
m (16QAM)
319mW
/ 223mW
This is the performance comparison of 60GHz RF front-ends.
Previous works, from SiBeam and LETI employ a hetero-dyne architecture.
On the other hand, we employ a direct-conversion architecture.
Due to the direct-conversion architecture, the power consumption is much smaller than the previous hetero-dyne transceivers.
And a data rate of more than 10Gb/s has been realized.
SiBeam achieve 2-channel wireless communication.
On the other hand, this work achieves a full 4-channel wireless communication.
In terms of EVM, we achieve -23dBm, and this is 4dB improvement compared to previous works.
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011

21. Performance Comparison
QPSK+16QAM
Tokyo Tech
all oscillators inc.
QPSK+16QAM
Univ. of Toronto
IMEC
16QAM
UCB
SiBeam, CEA-LETI
This is the data rate comparison of 60GHz RF-front-ends.
The x-axis is year, and y-axis is data rate.
From this figure, it finds that our works lead the 60GHz wireless communication.
Moreover 16Gb/s data rate has been achieved, and hopefully it will be presented at the next ISSCC.
NEC
OOK
FSK
OOK
Toshiba

22. Outline Motivation RF Front-end Measurement and Comparison Conclusion
60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL)
60GHz transmitter(Tx)
60GHz receiver(Rx)
Measurement and Comparison
Conclusion
Finally I’ll conclude this presentation.

23. Summary and Conclusion
A 60-GHz direct-conversion wireless transceiver is implemented using CMOS 65nm process.
Excellent phase noise has been realized in full 4-channels.
The first complete transceiver covering full 4 channels with 16QAM.
Max 10Gbps data rate has been realized.
A high-speed low-power mmW transceiver has been realized.
In this presentation, a 60-GHz direct-conversion wireless transceiver is implemented using a 65nm CMOS process.
Excellent phase noise performance has been realized in full-4channels by the proposed topology.
This is the first complete transceiver covering 4 frequency channels with 16QAM wireless communication.
A highly-integrated 60GHz wireless transceiver is demonstrated with the proposed injection-locked frequency synthesizer.

24. Thank you for your attention.

25. Backup slides

26. 60GHz Quadrature LO Scenario
60GHz quadrature PLL
Phase noise degradation
e.g. at 60GHz [1]
60GHz PLL with 90o hybrid [2]
I/Q mismatch
60GHz quadrature ILO with 20GHz PLL[This work]
ILO: Injection-locked oscillator
Very wide tuning
Excellent phase noise
For direct-conversion transceivers, a quadrature local synthesizer is required.
There are several ways to obtain a quadrature local signal.
One of the most common ways is to use a doubled-frequency oscillator and a frequency divider.
However, it is not feasible at 60GHz because we need a 120GHz oscillator.
Use of a quadrature oscillator is also very common, but unfortunately, the phase noise at 60GHz is generally not so good because of passive loss.
According to the circuit in reference [1], it has a phase noise of -75dBc/Hz at 1MHz-offset frequency even though a phase noise of -90dBc/Hz is required.
The circuit in reference [2] uses a 90 degree hybrid with a 30GHz push-push oscillator.
However, I/Q mismatch is a headachy problem for this kind of circuit topology.
So, in this work, I use a 60GHz quadrature injection-locked oscillator with a 20GHz PLL.
By using the injection-locking technique, the phase noise is basically determined by the 20GHz PLL.
And, we have realized a 58-to-64GHz frequency range with excellent phase noise performance for a 60GHz quadrature oscillator.
It is -96dBc/Hz at 1MHz offset frequency, which is 20dB better than the previous work.
This 20dB improvement is really important to realize our 16QAM direct-conversion transceiver.
[1] K. Scheir, et al., ISSCC 2009
[2] C. Marcu, et al., ISSCC 2009

27. Schematic of QILO I-Q coupling with tail transistor
Half side injection
varactor

28. back-to-back layout I-Q coupling path coventional：40um this work：8um
reduction of parasitic component
Low I-Q mismatch
180um
85um
Die photo of QILO
Schematic

29. Layout of ILO

30. Injection Locked Oscillator（ILO）
Pulling of VCOs
Injection Lock
n=1,2,3…
Free-run: 60.1GHz → Locked: 60GHz
Phase noise is determined by following equation[12].
[12] X. Zhang, TMTT 1992

31. MIM Transmission Line De-coupling use Modeling accuracy
2007/10/29
MIM Transmission Line
De-coupling use
Modeling accuracy
Avoiding self-resonance of parallel-plate capacitors
MIM capacitor
Frequency [GHz]
Z0 [Ohm]
Measured
Model
MIM transmission line
Next, I’ll explain about the MIM transmission line.
Basically, this MIM transmission line is used as a de-coupling device
because there are no ideal lumped-constant capacitors at 60GHz.
This is a top view, and MIM capacitors are arranged along the signal line to reduce characteristic impedance.
Each MIM capacitor has a finger shape, and the finger width is optimized considering self-resonance frequency.
This graph shows measured characteristic impedance, and it is about 3 ohms at around 60GHz.
The MIM transmission line can be used as a scalable de-coupling device,
and it’s very important for modeling accuracy.
50W transmission line
T. Suzuki, et al., ISSCC 2008

32. RF Performance SummaryTx CG
18dB
P1dB
-2dBm
Psat
5.6dBm Rx CG
23dB (high-gain mode)
9dB (low-gain mode) NF
< 4.9dB (high-gain mode)
IIP3
-14dBm (low-gain mode) LO
Injection PLL
19.44, 20.16, 20.88, 21.60GHz
Ref. spur
GHz
Locking range
1.4GHz
Quadrature ILO
GHz (free-run)
Phase
< -95dBc/Hz (every channel)
P1dB
Ch1: -3.77dBm
Ch2: -2.9dBm
Ch3: -1.86dBm
Ch4: -1.86dBm
GHz (free-run)
GHz (estimated lock range)

33. Measured Rx SNR
16QAM(17dB)
QPSK(10dB)

34. Link Budget QPSK 16QAM 1.5m 0.5m 3.5Gb/s 7.0Gb/s Modulation Distance
Data rate (2.16GHz-BW)
3.5Gb/s
7.0Gb/s
Tx output
6.0dBm
Back-off
4.0dB
5.0dB
Tx/Rx antenna gain
6.0dBi
Implementation loss
-3.0dB NF
6.0dB
Received CNR
14.0dB
22.5dB
Margin
+4.6dB
+4.3dB

35. Mixer Layout (Core) Mixer core excluding intersection
LO line and RF line cross in matching network
Mixer core including intersection
bad symmetrical property
LO+
LO-
RF+
RF-
RF+
RF-
LO-
LO+
Symmetric core
Asymmetric core

36. Symmetric Core Layout
Symmetric core needs crossed and complicated matching network.
LO-
RF-
LO+
RF+
IF+
IF-

37. Asymmetric Core Layout
Asymmetric core can realize simple matching network.
LO+
LO-
RF-
RF+
IF+ IF-

38. I/Q Mismatch by Mixer Layout
Sideband Rejection Ratio (SRR)
SRR
Amplitude
Error
Phase
Symmetric
core
-24.5 [dB]
0.04[dB]
6.8[deg]
Asymmetric
-42.3[dB]
0.02[dB]
0.9[deg]

39. Performance Comparison
Arch.
Max. rate in 16QAM
Distance for BER <10-3
PDC (Tx/Rx)
IMEC[5]
Direct
7Gb/s
ch.1-4(EVM < -17dB)
(not wireless)
176mW
/112mW
(w/o PLL)
CEA-LETI[6]
Hetero
3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
1,357mW
/ 454mW
SiBeam
[7]
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
1,820mW
/ 1,250mW
This work
10Gb/s
ch.1-4 (EVM < -23dB)
m (QPSK)
m (16QAM)
319mW
/ 223mW
This is a performance comparison of 60GHz RF front-ends.
As previous work, SiBeam employ a hetero-dyne architecture.
On the other hand, we employ a direct-conversion architecture.
Due to the direct-conversion architecture, our power consumption is much smaller than the previous hetero-dyne transceivers.
and a data rate of more than 10Gb/s has been realized.
SiBeam and our previous work achieve 2-channel wireless communication, like channel 1,2 and channel 2,3.
On the other hand, this work achieves a full 4-channel wireless communication like channel 1,2,3,and 4..
The maximum communication distance is more than 1.3m in QPSK, and more than 0.3m in 16QAM within a bit-error-rate of 10 to the power of -3.
;; LETI also realizes a 4-channel connectivity.
In terms of error vector magnitude EVM, we achieve -23dB, which is a 4-dB improvement.
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011

40. Performance Comparison
Max. rate in 16QAM
Distance for BER <10-3 with 2.16GHz-BW
Area
IMEC[5]
7Gb/s
ch.1-4(EVM < -17dB)
(not wireless)
0.7mm2
CEA-LETI [6]
3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
9.3mm2(TRx)
0.46mm2(PA)
SiBeam [7]
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
72.2mm2(Tx)
72.7mm2(Rx)
This work
10Gb/s
ch.1-4 (EVM < -23dB)
m (QPSK)
m (16QAM)
5.48mm2
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011

41. Performance Comparison
Integration
#ch.
Data rate (16QAM)
PDC (Tx/Rx)
IMEC[5]
RF (Direct) 4
7Gb/s
(not wireless)
176mW
/112mW
(w/o PLL)
CEA-LETI [6]
RF (Hetero)
3.8Gb/s
1,357mW
/ 454mW
SiBeam [7] 2
1,820mW
/ 1,250mW
Tokyo Tech
(This work)
RF: w/ wider-BW
10Gb/s
319mW
/ 223mW
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011

42. Challenges for 60GHz Transceivers
Direct-conversion full CMOS integration
16QAM/8PSK/QPSK/BPSK support for IEEE c, WiGig, Wireless HD, etc.
60GHz quadrature LO
Low phase noise for 16QAM
Wide frequency tuning (58-to-65GHz)
I/Q phase balance
60GHz LNA
Low NF & High linearity
Wide bandwidth (gain flatness)
60GHz PA
10dBm output
High PAE (>10%)
There are several challenges to realize 60GHz transceivers.
Direct-conversion full-CMOS integration is a very important target.
In addition, 16QAM has to be supported for IEEE standards, WiGig, Wireless HD, and so on.
But, the 16QAM direct-conversion architecture causes stringent requirements for individual circuit blocks, especially for local synthesizers.
For a direct-conversion transceiver, a 60GHz quadrature local synthesizer is required,
but it’s really difficult to achieve a 60GHz quadrature oscillation.
In addition, we need a very low phase-noise performance for 16QAM,
and a wide frequency tuning range such as 58-to-65GHz.
Unfortunately, there is a trade-off between phase noise and frequency tuning range,
so it’s really difficult to satisfy both the requirements.
In addition, we also have to maintain I/Q phase balance of a quadrature oscillator.
It’s also very important for direct-conversion transceivers.
For a 60GHz LNA, a low noise figure and high linearity are common requirements,
and the gain flatness is also important to improve ISI.
For a 60GHz PA, high output power and high power efficiency are required.
Among these requirements, the 60GHz quadrature local synthesizer is really important for realizing a direct-conversion transceiver.

43. Injection-Locked Oscillator
Previous work [3]
This work
20GHz
20GHz
PPF Dq I Q I Q
3Dq
One of the most important design considerations is I/Q mismatch.
The left one is a block diagram of the conventional quadrature injection-locked oscillator.
It uses a polyphase filter to generate a 20GHz quadrature injection signal.
However, the polyphase filter generally has a phase mismatch, and it becomes three times larger at 60GHz.
Unfortunately, it cannot be compensated by a 60GHz I/Q cross-coupling,
so it’s a critical problem for direct-conversion transceivers.
On the other hand, in this work, we employ a single-side injection to reduce I/Q mismatch.
This circuit does not use a polyphase filter, so there is no problem of I/Q mismatch in a 20GHz injection signal.
Basically, I/Q balance can be maintained by a 60GHz I/Q cross-coupling,
and it’s very robust across a wide frequency range theoretically.
Locking range is not so different from the previous one according to our simulation result.
60GHz
60GHz
I/Q mismatch
Single-side injection
- Small I/Q mismatch
- The same locking range
PPF:polyphase filter
[3] W. Chan, el al., ISSCC 2008