1. EKT 221 / 4 DIGITAL ELECTRONICS II
SUBJECT INTRODUCTION

2. Pn. Wan Azlianawati bt. Wan Aziz Pn. Norlida bt. Abu Bakar
Lecturer:
Pn. Norina bt. Idris
Jejawi Block A, Level 1
04 –
012 –
PLVs:
Pn. Wan Azlianawati bt. Wan Aziz
Pn. Norlida bt. Abu Bakar
Electronics Lab, Kubang Gajah
04 –

3. - Labs (Lab & Mini Project) 50% - Tests - Tutorial/Assignment/Quizzes
Grading:
50% - Final exam
- Labs (Lab & Mini Project)
50% Tests
- Tutorial/Assignment/Quizzes

4. Main Text Book:
Digital Electronics Design, Prentice Hall.
Price = RM 58.
Used in Digit I & Digit II.

5. Frank Vahid, Digital Design, John Wiley, 2007.
Other References:
Frank Vahid, Digital Design, John Wiley, 2007.
M. Morris Mano & Charles R. Kime, Logic and Computer Design Fundamentals, 3rd Edition, Prentice Hall.
Floyd, Digital Fundamentals, Prentice Hall.

6. Teaching Plan

7. OUTLINE Chapter 0 : Combinational Logic Design Revision CAD Tools
Design Procedure

8. OUTLINE Chapter 1 : Registers & Register Transfers
Registers, Microoperations & Implementations
Counters, register cells, buses & serial operations
Counters
Register cell design
Multiplexer and bus-based transfers for multiple registers
Serial transfers & microoperations

9. OUTLINE Chapter 2 : Sequencing & Control State machine
Datapath & control
Algorithmic State Machine (ASM)
Hardwired control
Microprogrammed control

10. OUTLINE Chapter 3 : Memory Basics Memory definitions
Random Access Memory (RAM)
Static RAM integrated circuits
Arrays of SRAM IC
Dynamic RAM IC
DRAM types
Arrays of DRAM IC

11. OUTLINE
Chapter 4 : Computer Design Basics
Datapath

12. EXPERIMENTS Lab 1 -- Introduction to MaxPlus II
Lab Introduction to UP2 Training Board
Lab Combinational System
Lab Multiplier
Lab Up-Down Counter
Lab Serial Multiplier (Part 1)
Lab Serial Multiplier (Part 2)
Lab State Machine (Moore Model)

13. Course Outcomes (COs) CO1: Ability to design digital systems at the
sub-system level.
CO2: Ability to use MaxPlus II design software.
CO3: Ability to download the design software to
FPGA device for testing purposes.
CO4: Ability to participate effectively in a team.

14. What to expect & do … In Class
To do:
Sign up the attendance sheet
Do not be NOisY..
Pay attention
To expect:
Surprise quizzes
In-class assignments

15. What to do after class … Read the textbook Assignment Folder
Answer the given questions
Hand in before semester break, and before study break

16. What to do BEfore lab …
Download the lab sheet and relevant materials from portal.
Read the lab sheet and do the theoretical preparations.
Watch oUT iF the leCturer gives lab tips during the lecture.

17. What to expect & do … In Lab
To Bring:
The lab sheet (well-prepared)
Relevant manuals & guides given in portal
The text book
The Lecture slides .. Esp. the lab tips slides
To do:
Do your oWn work ..
Do not cOPy others…
To submit:
The Lab Sheet (answer all questions given)

18. What to expect & do … In Class
To do:
Sign up the attendance sheet
Do not be NOisY..
Pay attention
To expect:
Surprise quizzes
In-class assignments

19. What to do after class … Read the textbook Assignment Folder
Answer the given questions
Hand in before semester break, and before study break

20. What to expect & do … In Lab
To do:
Do your oWn work ..
Do not cOPy others…
Bring your own “test pen” and “IC extractor”
Submit the lab sheet
To expect:
Lab Test

21. The eND of sEmester cHallenGe…
The mINI pRoJect…
The fiNaL eXaM…
Study break coincides with the Hari Raya holidays.

22. soMe miNi pRoJect eXaMples

23. Introduction to Lab 0

24. Max+Plus II

25. Max+Plus II
It is a Computer Aided Design (CAD) tool to create logic circuits.
It can work on simulation through waveform generator OR
It can be programmed/downloaded to an Altera UP (Univ. Prog.) board.
Connect using
byte blaster cable

26. Altera Max+Plus II
Altera UP-2 Training Board

27. Lab 0 : Intro to Max+Plus II
Intro to Altera Max+Plus II software
Understanding behavior of a basic logic circuits
Analyze waveform simulation

28. Lab 0 : Intro to Max+Plus II
You will learn to:
Insert basic logic symbols using Graphic Editor
Use of Max+Plus II library
Use 7 types of basic logic gates:
OR (OR2)
AND (AND2)
NOT
NAND (NAND2)
NOR (NOR2)
XOR
XNOR
Use Input and Output Pins
Make connections
Simulate using Waveform Editor
Creating Symbol from your logic gates design

29. Type of editor in Altera Max+Plus II
In Lab0 you will learn to use:
Graphic Editor File
Waveform Editor File

30. Graphic Editor File File -> New -> Select Graphic Editor
Double left click will pop out the enter symbol window
Library of symbols :
prim – basic logic blocks
mf – macro funtions of 7400 series
mega_lpm – high level cct funtions
edif – macro funtion building blocks

31. Inserting Symbols from the library
Please browse around to fimiliarize with all the symbols available in the library and check the symbol drawing representation

32. Your project should look something like this

33. Waveform Editor : Simulation
Once you have finish designing using the Graphic Editor
Open up the Waveform Editor
File -> New -> Select Waveform Editor
Adjust your End time and Grid Size
File ->End time (total length of simulation wave)
Options -> Grid Size (interval)

34. How to determine End Time and Grid Size
Seconds (s)
Miliseconds (ms)
Miroseconds (us)
Nanoseconds (ns)
OTHER EXAMPLES??
Considerations : no of input & cycle
Eg : 3 input and 1 cycle ; 000 to 111 = 8 levels
We can use : End Time 8s and Grid Size 1s
Or : End time 8ms and Grid 1ms
BUT is it practicle???
BEST case : End time 1ms and Grid 500us

35. Waveform Editor : Simulation
Type in your input and output pins in this column
Make sure they are the same as the one used in the project

36. Waveform Editor : Simulation
Your output should be similar to this

37. Warning Make sure step 10, 11 and 12 is followed
10 : File -> Project -> Save & Check
11 : Processing -> Functional SNF Extractor
12 : File -> Project -> Save, Compile & Simulate
Ensure also that lab0 project is set as current project :
File->Project -> Set project to current file