1. snick  snack CPSC 121: Models of Computation 2011 Winter Term 1 Building & Designing Sequential Circuits Steve Wolfman, based on notes by Patrice Belleville and others 1

2. Outline Prereqs, Learning Goals, and Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 2

3. Learning Goals: Pre-Class We are mostly departing from the readings to talk about a new kind of circuit on our way to a full computer: sequential circuits. The pre-class goals are to be able to: –Trace the operation of a deterministic finite- state automaton (represented as a diagram) on an input, including indicating whether the DFA accepts or rejects the input. –Deduce the language accepted by a simple DFA after working through multiple example inputs. 3

4. Learning Goals: In-Class By the end of this unit, you should be able to: –Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions. –Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!). –Explain how and why each part of the resulting circuit works. 4

5. Where We Are in The Big Stories Theory How do we model computational systems? Now: With our powerful modelling language (pred logic), we can prove things like universality of NOR gates for combinational circuits. Our new model (DFAs) are sort of full computers. Hardware How do we build devices to compute? Now: Learning to build a new kind of circuit with memory that will be the key new feature we need to build full- blown computers! (Something you’ve seen in lab from a new angle.) 5

6. Outline Prereqs, Learning Goals, and Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 6

7. Problem: Push-Button Light Switch Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed. (Like the light switches in Dempster: Press and release, and the light changes state. Press and release again, and it changes again.) ? ? 7

8. A Light Switch “DFA” light off light on pressed This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light. ? ? 8

9. Problem: Light Switch Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed. Identifying inputs/outputs: consider these possible inputs and outputs: Input 1 : the button was pressed Input 2 : the button is down Output 1 : the light is on Output 2 : the light changed states Which are most useful for this problem? a.Input 1 and Output 1 b.Input 1 and Output 2 c.Input 2 and Output 1 d.Input 2 and Output 2 e.None of these 9 ? ?

10. COMPARE TO: Lecture 2’s Light Switch Problem: Design a circuit to control a light so that the light changes state any time its switch is flipped. ? ? Identifying inputs/outputs: consider these possible inputs and outputs: Input 1 : the switch flipped Input 2 : the switch is on Output 1 : the light is on Output 2 : the light changed states Which are most useful for this problem? a.Input 1 and Output 1 b.Input 1 and Output 2 c.Input 2 and Output 1 d.Input 2 and Output 2 e.None of these 10

11. Outline Prereqs, Learning Goals, and !Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 11

12. Departures from Combinational Circuits MEMORY: We need to “remember” the light’s state. EVENTS: We need to act on a button push rather than in response to an input value. 12

13. Problem: How Do We Remember? We want a circuit that: Sometimes… remembers its current state. Other times… loads a new state to remember. 13 Sounds like a choice. What circuit element do we have for modelling choices?

14. Worked Problem: “Muxy Memory” How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1. 0 1 output ??? new data control 14

15. Worked Problem: Muxy Memory How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1. 0 1 output (Q) old output (Q’) new data (D) control (G) This violates our basic combinational constraint: no cycles. 15

16. Truth Table for “Muxy Memory” Fill in the MM’s truth table: GDQ' 000 001 010 011 100 101 110 111 a.b.c.d.e. Q 0 1 0 1 0 1 0 1 Q 0 1 0 1 0 0 1 1 Q 0 1 0 1 0 F F 1 Q 0 0 0 1 1 1 0 1 None of these 16

17. Worked Problem: Truth Table for “Muxy Memory” Worked Problem: Write a truth table for the MM: GDQ'Q 0000 0011 0100 0111 1000 1010 1101 1111 Like a “normal” mux table, but what happens when Q'  Q? 17

18. Worked Problem: Truth Table for “Muxy Memory” Worked Problem: Write a truth table for the MM: GDQ'Q 0000 0011 0100 0111 1000 1010 1101 1111 Q' “takes on” Q’s value at the “next step”. 18

19. “D Latch” Symbol + Semantics We call a “muxy memory” a “D latch”. When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D. 0 1 output (Q) old output (Q’) new data (D) control (G) 19

20. D Latch Symbol + Semantics When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D. 0 1 output (Q) old output (Q’) new data (D) control (G) 20

21. D Latch Symbol + Semantics When G is low, the latch maintains its memory. When G is high, the latch loads a new value from D. output (Q) new data (D) control (G) D G Q 21

22. Hold On!! Why does the D Latch have two inputs and one output when the mux inside has THREE inputs and one output? a.The D Latch is broken as is; it should have three inputs. b.A circuit can always ignore one of its inputs. c.One of the inputs is always true. d.One of the inputs is always false. e.None of these (but the D Latch is not broken as is). 22

23. Using the D Latch for Circuits with Memory Problem: What goes in the cloud? What do we send into G? D G Q Combinational Circuit to calculate next state input ?? 23 We assume we just want Q as the output.

24. Using the D Latch for Our Light Switch Problem: What do we send into G? D G Q no (0 bit) inputoutput ?? current light state a.T if the button is down, F if it’s up. b.T if the button is up, F if it’s down. c.Neither of these. 24

25. A Timing Problem: We Need EVENTS! Problem: What do we send into G? D G Q output “pulse” when button is pressed current light state button pressed As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad! 25

26. A Timing Problem, Metaphor (from MIT 6.004, Fall 2002) What’s wrong with this tollbooth? P.S. Call this a “bar”, not a “gate”, or we’ll tie ourselves in (k)nots. 26

27. A Timing Solution, Metaphor (from MIT 6.004, Fall 2002) Is this one OK? 27

28. A Timing Problem Problem: What do we send into G? D G Q output “pulse” when button is pressed current light state button pressed As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad! 28

29. A Timing Solution (Almost) D G Q output button pressed D G Q Never raise both “bars” at the same time. 29

30. A Timing Solution D G Q output D G Q ?? The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through). 30

31. A Timing Solution D G Q output D G Q button pressed button press signal 31

32. Button/Clock is LO (unpressed) D G Q output D G Q LO 32 1 1 0 0 1 Why isn’t the right latch’s Q output 1? a.An error: it should be. b.The G input is 0. c.Not enough time for the D input to propagate. d.I don’t know.

33. Button goes HI (is pressed) D G Q output D G Q HI 33 1 1 0 1 1

34. Propagating signal.. left NOT, right latch D G Q output D G Q HI 34 1 1 1 1 0

35. Propagating signal.. right NOT (steady state) D G Q output D G Q HI 35 0 1 1 1 0

36. Button goes LO (released) D G Q output D G Q LO 36 0 1 1 0 0

37. Propagating signal.. left NOT D G Q output D G Q LO 37 0 1 1 0 1

38. Propagating signal.. left latch (steady state) D G Q output D G Q LO 38 0 0 1 0 1 And, we’re done with one cycle. How does this compare to our initial state?

39. Master/Slave D Flip-Flop Symbol + Semantics When CLK goes from low to high, the flip-flop loads a new value from D. Otherwise, it maintains its current value. output (Q) new data (D) control or “clock” signal (CLK) D G Q D G Q 39

40. Master/Slave D Flip-Flop Symbol + Semantics When CLK goes from low to high, the flip-flop loads a new value from D. Otherwise, it maintains its current value. output (Q) new data (D) control or “clock” signal (CLK) D G Q D G Q 40

41. Master/Slave D Flip-Flop Symbol + Semantics When CLK goes from low to high, the flip-flop loads a new value from D. Otherwise, it maintains its current value. output (Q) new data (D) control or “clock” signal (CLK) D G Q D G Q 41

42. Master/Slave D Flip-Flop Symbol + Semantics When CLK goes from low to high, the flip-flop loads a new value from D. Otherwise, it maintains its current value. new data clock signal D Q output 42 The clock and data inputs are SWAPPED compared to Logisim’s symbol; sorry!

43. Outline Prereqs, Learning Goals, and !Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 43

44. Branch Prediction Machine An “if” in hardware is called a “branch”. Computers “pre-execute” instructions... but to pre-execute a “branch”, they must guess whether to execute the then or else part. Here’s one reasonable guess: whatever the last branch did, the next one will, too. Why? In recursion, how often do we hit the base case vs. the recursive case? 44

45. Implementing the Branch Predictor (First Pass) Here’s the corresponding DFA. (Instead of accept/reject, we care about the current state.) yes no taken not taken taken 45 not taken Experiments show it generally works well to add “inertia” so that it takes two “wrong guesses” to change the prediction…

46. Implementing the Branch Predictor (Final Version) Here’s a version that takes two wrong guesses in a row to admit it’s wrong: Can we build a branch prediction circuit? YES! yes? no? NO! not taken taken not taken taken not taken taken not taken 46

47. Abstract Template for a DFA Circuit input clock 47 compute next state store current state Each time the clock “ticks” move from one state to the next.

48. Template for a DFA Circuit Each time the clock “ticks” move from one state to the next. D Q Combinational circuit to calculate next state/output input CLK Each of these lines (except the clock) may carry multiple bits; the D flip-flop may be several flip-flops to store several bits. 48

49. How to Implement a DFA: Slightly Harder (1)Number the states and figure out b : the number of bits needed to store the state number. (2)Lay out b D flip-flops. Together, their memory is the state as a binary number. (3)Build a combinational circuit that determines the next state given the input and the current state. (4)Use the next state as the new state of the flip-flops. 49

50. How to Implement a DFA: Slightly Easier MUX Solution (1)Number the states and figure out b : the number of bits needed to store the state number. (2)Lay out b D flip-flops. Together, their memory is the state as a binary number. (3) For each state, build a combinational circuit that determines the next state given the input. (4)Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used! (5)Use the MUX’s output as the new state of the flip- flops. 50 With a separate circuit for each state, they’re often very simple!

51. Implementing the Predictor Step 1 YES! 3 yes? 2 no? 1 NO! 0 not taken taken not taken taken not taken taken not taken What is b (the number of 1-bit flip-flops needed to represent the state)? a.0, no memory needed b.1 c.2 d.3 e.None of these As always, we use numbers to represent the inputs: taken = 1 not taken = 0 51

52. Just Truth Tables... Current StateinputNew state 00000 00101 010 011 100 101 110 111 YES! 3 yes? 2 no? 1 NO! 0 not taken taken not taken taken not taken taken not taken What’s in this row? a.0 0 b.0 1 c.1 0 d.1 1 e.None of these. 52 Reminder:taken = 0 not taken = 1

53. Just Truth Tables... Current StateinputNew state 00000 00101 01000 01111 10000 10111 11010 11111 YES! 3 yes? 2 no? 1 NO! 0 not taken taken not taken taken not taken taken not taken 53 Reminder:taken = 0 not taken = 1

54. Implementing the Predictor: Step 3 We always use this pattern. In this case, we need two flip-flops. D Q Combinational circuit to calculate next state/output input CLK D Q Let’s switch to Logisim schematics... 54

55. ??? Implementing the Predictor: Step 3 D Q ?? input CLK D Q 55 state 0 state 1

56. Implementing the Predictor: Step 3 56 ??? state 0 state 1 input

57. Implementing the Predictor: Step 5 (easier than 4!) 57 The MUX “trick” here is much like in the ALU from lab! state 0 state 1 input

58. Implementing the Predictor: Step 4 58 state 0 state 1 input In state number 0, what’s the new value of state 0 ? a.input b.~input c.1 d.0 e.None of these.

59. Implementing the Predictor: Step 4 59 state 0 state 1 input In state number 1, what’s the new value of state 0 ? a.input b.~input c.1 d.0 e.None of these.

60. Implementing the Predictor: Step 4 input In state number 2, what’s the new value of state 0 ? a.input b.~input c.1 d.0 e.None of these. 60 state 0 state 1

61. Implementing the Predictor: Step 4 input In state number 3, what’s the new value of state 0 ? a.input b.~input c.1 d.0 e.None of these. 61 state 0 state 1

62. Just Truth Tables... state 0 state 1 inputstate 0 'state 1 ' 00000 00101 01000 01111 10000 10111 11010 11111 62 input

63. Implementing the Predictor: Step 4 63 state 0 state 1 input

64. Implementing the Predictor: Step 4 In state number 0, what’s the new value of state 1 ? a.input b.~input c.1 d.0 e.None of these. 64 state 1 input

65. Implementing the Predictor: Step 4 TADA!! 65 state 0 state 1 input

66. You can often simplify, but that’s not the point. 66 state 0 state 1 input

67. Just for Fun: Renaming to Make a Pattern Clearer... predlastinputpred'last' 00000 00101 01000 01111 10000 10111 11010 11111 YES! 3 yes? 2 no? 1 NO! 0 not taken taken not taken taken not taken taken not taken 67

68. Outline Prereqs, Learning Goals, and !Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 68

69. Steps to Build a Powerful Machine (1)Number the states and figure out b : the number of bits needed to store the state number. (2)Lay out b D flip-flops. Together, their memory is the state as a binary number. (3) For each state, build a combinational circuit that determines the next state given the input. (4)Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used! (5)Use the MUX’s output as the new state of the flip- flops. 69 With a separate circuit for each state, they’re often very simple!

70. How Powerful Is a DFA? How does a DFA compare to a modern computer? a.Modern computer is more powerful. b.DFA is more powerful. c.They’re the same. 70

71. Where We’ll Go From Here... We’ll come back to DFAs again later in lecture. In lab you have been and will continue to explore what you can do once you have memory and events. And, before long, how you combine these into a working computer! Also in lab, you’ll work with a widely used representation equivalent to DFAs: regular expressions. 71

72. Outline Prereqs, Learning Goals, and !Quiz Notes Problems and Discussion –A Pushbutton Light Switch –Memory and Events: D Latches & Flip-Flops –General Implementation of DFAs (with a more complex DFA as an example) –How Powerful are DFAs? Next Lecture Notes 72

73. Learning Goals: In-Class By the end of this unit, you should be able to: –Translate a DFA into a sequential circuit that implements the DFA. –Explain how and why each part of the resulting circuit works. 73

74. Next Lecture Learning Goals: Pre-Class By the start of class, you should be able to: –Convert sequences to and from explicit formulas that describe the sequence. –Convert sums to and from summation/”sigma” notation. –Convert products to and from product/”pi” notation. –Manipulate formulas in summation/product notation by adjusting their bounds, merging or splitting summations/products, and factoring out values. 74

75. Next Lecture Prerequisites See the Mathematical Induction Textbook Sections at the bottom of the “Textbook and References” page.Mathematical Induction Textbook Sections Complete the open-book, untimed quiz on Vista that’s due before the next class. 75

76. snick  snack More problems to solve... (on your own or if we have time) 76

77. Problem: Traffic Light Problem: Design a DFA with outputs to control a set of traffic lights. 77

78. Problem: Traffic Light Problem: Design a DFA with outputs to control a set of traffic lights. Thought: try allowing an output that sets a timer which in turn causes an input like our “button press” when it goes off. Variants to try: - Pedestrian cross-walks - Turn signals - Inductive sensors to indicate presence of cars - Left-turn signals 78

79. 1 23 aa a,b,c b b,c c PROBLEM: Does this accept the empty string? 79

80. “Moore Machines”  DFAs whose state matters A “Moore Machine” is a DFA that’s not about accepting or rejecting but about what state it’s in at a particular time. Let’s work with a specific example... 80