2. Problems in Memory Management CS 1550 Recitation October 9 th, 2002 The questions in this slide are from Andrew S. Tanenbaum's textbook page 264.

3. 11. If an instruction takes 10 nsec and a page fault takes and additional n nsec, give a formula for the effective instruction time if page faults occur every k instructions. Consider k instructions: k-1 instructions execution without page fault: 10 * (k - 1) nsec 1 instuction with page fault: (10 + n) * 1nsec Average: (10*(k-1) + (10+n)*1) / k = 10 + n/k nsec

4. 12. A machine has a 32-bit address space and an 8- KB page. The page is entirely in harware, with one 32-bit word per entry. The page table is copied to the hardware from memory, at one word every 100 nsec. If each process runs for 100 msec (including the time to load the page table), what fraction of the CPU time is devoted to loading the page tables? 1 nsec = 1/1,000,000,000 sec 1 msec = 1/1,000 sec Page size : 8-KB  # of offset bits 8-KB = 2^13 Bytes Offset bits : 13 bits Page number: 32 – 13 = 19 bits

5. How many pages are there? 2 ^ 19 = 524288 Load time: 524288 * 100 nsec = 0.0524288 sec CPU time: 100 msec = 0.1 sec Fraction: 0.0524288 / 0.1 = 52.4% Real World … 32-bit address space == 32-bit word per entry Always?