Presentation is loading. Please wait.

Presentation is loading. Please wait.

Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department.

Similar presentations


Presentation on theme: "Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department."— Presentation transcript:

1 Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department Computer System Architecture ESGD2204 Monday, 23 th February 2010 Lecture 6

2 Performance Measures and Calculation

3

4

5

6

7

8

9

10

11

12

13 Mobile devices care about battery life more than power, so energy is the proper metric, measured in joules: Power Metric

14 Example: Power Some microprocessors today are designed to have adjustable voltage, so that a 15% reduction in voltage may result in a 15% reduction in frequency. What would be the impact on dynamic power?

15 Answer Since the capacitance is unchanged, the answer is the ratios of the voltages and frequencies: Thereby reducing power to about 60% of the original.

16 Cost of an Integrated Circuit In an increasingly competitive computer marketplace where standard parts—disks, DRAMs, and so on—are becoming a significant portion of any system’s cost. integrated circuit costs are becoming a greater portion of the cost that varies between computers, especially in the high-volume, cost-sensitive portion of the market.

17 Thus, computer designers must understand the costs of chips to understand the costs of current computers. Although the costs of integrated circuits have dropped exponentially, the basic process of silicon manufacture is unchanged: A wafer is still tested and chopped into dies that are packaged. Cost of an Integrated Circuit

18 Thus the cost of a packaged integrated circuit is: Cost of an Integrated Circuit Cost of integrated circuit = Cost of die= Cost of wafer / (Dies per wafer × Die yield)

19 The number of dies per wafer is approximately the area of the wafer divided by the area of the die. It can be more accurately estimated by: Cost of an Integrated Circuit

20 However, this only gives the maximum number of dies per wafer. The critical question is: What is the fraction of good dies on a wafer number, or the die yield? A simple model of integrated circuit yield, which assumes that defects are randomly distributed over the wafer and that yield is inversely proportional to the complexity of the fabrication process, leads to the following: Cost of an Integrated Circuit α is a parameter that corresponds roughly to the number of critical masking levels,

21 Example Find the number of dies per 300 mm (30 cm) wafer for a die that is 1.5 cm on a side.

22 Example Find the number of dies per 300 mm (30 cm) wafer for a die that is 1.5 cm on a side. Answer : The die area is 2.25 cm2. Thus

23 Example Find the die yield for dies that are 1.5 cm on a side and 1.0 cm on a side, assuming a defect density of 0.4 per cm 2 and α is 4. Where α is a parameter that corresponds roughly to the number of critical masking levels,

24 Answer The total die areas are 2.25 cm 2 and 1.00 cm 2. For the larger die, the yield is For the smaller die, it is

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40


Download ppt "Eng. Mohammed Timraz Electronics & Communication Engineer University of Palestine Faculty of Engineering and Urban planning Software Engineering Department."

Similar presentations


Ads by Google