1. AEGIS 2008 Annual Assembly 11 December 2008 PALESS – Parallel Analogue and Logical Simulation System Marko Dimitrijević Faculty of electronic engeneering, University of Niš Serbia marko@venus.elfak.ni.ac.yu

2. A E G I S 11 December 2008 Introduction The simulation process of modern complex integrated circuits and systems is memory and computationally intensive and algorithmically complex. An efficient way to cope with long simulation runtimes and high computational requirements is parallel simulation on a computer grid. PALESS enables parallel simulation of electronic circuits and systems, characterized as large scale, mixed- signal, and mixed-mode including non-electrical components and phenomena on the grid. It can reduce long simulation runtimes of large mixed-signal circuits and microelectromechanical systems described by partial differential equations. The simulation process speedup will increase integrated circuit design efficiency. AEGIS 2008 Annual Assembly

3. A E G I S 11 December 2008 Application requirements Obtain simulation speedup using parallel equation formulation for nonlinear analog circuit elements providing possibility to analyze more complex circuits; The Grid interface for the PALESS application; Possibility to run simultaneous simulations with different simulation parameters using required grid resources. AEGIS 2008 Annual Assembly

4. A E G I S 11 December 2008 Application requirements The simulation of electronic circuits and systems is memory and computationally intensive, time consuming process suitable for execution on the Grid. Message Passing Interface (MPI) AEGIS 2008 Annual Assembly Solutions vector (previous iteration) Solutions vector (past and past past time instants)

5. A E G I S 11 December 2008 Paralelization of equation AEGIS 2008 Annual Assembly Nonlinear elements contribution Constant + Linear time Dependent SLAVESLAVE SLAVESLAVE SLAVESLAVE MASTERMASTER In each iteration Nonlinear elements contribution Nonlinear elements contribution

6. A E G I S 11 December 2008 Master – Slave algorithm AEGIS 2008 Annual Assembly Master Slave NSlave 2Slave 1 Circuit matrix Simulation … MPI_Recv MPI_Send

7. A E G I S 11 December 2008 Implemenatation using MPI AEGIS 2008 Annual Assembly Solution vector (before previous iteration) Solution vector (previous iteration)

8. A E G I S 11 December 2008 Application speedup AEGIS 2008 Annual Assembly

9. A E G I S 11 December 2008 Aplication speedup AEGIS 2008 Annual Assembly Application performance by the number of MOSFETs (circuit complexity) is shown, speedup presents execution time ratio 2CPU/1CPU.

10. A E G I S 11 December 2008 Application speedup AEGIS 2008 Annual Assembly Application performance by the number of CPUs (circuit complexity is 1000 MOSFETs)

11. A E G I S 11 December 2008 Conclusion Application performance is improved using MPI Grid interface for PALLES aplication is developed Application is successfully deployed within Seegrid infrastructure AEGIS 2008 Annual Assembly