1. THE INVERTERS

2. DIGITAL GATES Fundamental Parameters l Functionality l Reliability, Robustness l Area l Performance »Speed (delay) »Power Consumption »Energy Digital Integrated Circuits© Prentice Hall 1995 Introduction

3. Noise in Digital Integrated Circuits Digital Integrated Circuits© Prentice Hall 1995 Introduction

4. DC Operation: Voltage Transfer Characteristic Digital Integrated Circuits© Prentice Hall 1995 Introduction

5. Mapping between analog and digital signals Digital Integrated Circuits© Prentice Hall 1995 Introduction

6. Definition of Noise Margins Digital Integrated Circuits© Prentice Hall 1995 Introduction

7. The Regenerative Property Digital Integrated Circuits© Prentice Hall 1995 Introduction

8. Fan-in and Fan-out Digital Integrated Circuits© Prentice Hall 1995 Introduction

9. The Ideal Gate Digital Integrated Circuits© Prentice Hall 1995 Introduction

10. VTC of Real Inverter Digital Integrated Circuits© Prentice Hall 1995 Introduction

11. Delay Definitions Digital Integrated Circuits© Prentice Hall 1995 Introduction

12. Ring Oscillator Digital Integrated Circuits© Prentice Hall 1995 Introduction

13. Power Dissipation Digital Integrated Circuits© Prentice Hall 1995 Introduction

14. CMOS INVERTER Digital Integrated Circuits© Prentice Hall 1995 Introduction

15. The CMOS Inverter: A First Glance Digital Integrated Circuits© Prentice Hall 1995 Introduction

16. CMOS Inverters Polysilicon In Out Metal1 V DD GND PMOS NMOS 1.2  m =2 Digital Integrated Circuits© Prentice Hall 1995 Introduction

17. Switch Model of CMOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction

18. CMOS Inverter: Steady State Response Digital Integrated Circuits© Prentice Hall 1995 Introduction

19. CMOS Inverter: Transient Response Digital Integrated Circuits© Prentice Hall 1995 Introduction

20. CMOS Properties l Full rail-to-rail swing l Symmetrical VTC l Propagation delay function of load capacitance and resistance of transistors l No static power dissipation l Direct path current during switching Digital Integrated Circuits© Prentice Hall 1995 Introduction

21. Voltage Transfer Characteristic Digital Integrated Circuits© Prentice Hall 1995 Introduction

22. PMOS Load Lines V DSp I Dp V GSp =-5 V GSp =-2 V DSp I Dn V in =0 V in =3 V out I Dn V in =0 V in =3 V in = V DD -V GSp I Dn = - I Dp V out = V DD -V DSp V out I Dn V in = V DD -V GSp I Dn = - I Dp V out = V DD -V DSp Digital Integrated Circuits© Prentice Hall 1995 Introduction

23. CMOS Inverter Load Characteristics Digital Integrated Circuits© Prentice Hall 1995 Introduction

24. CMOS Inverter VTC Digital Integrated Circuits© Prentice Hall 1995 Introduction

25. Simulated VTC Digital Integrated Circuits© Prentice Hall 1995 Introduction

26. Gate Switching Threshold Digital Integrated Circuits© Prentice Hall 1995 Introduction

27. MOS Transistor Small Signal Model Digital Integrated Circuits© Prentice Hall 1995 Introduction

28. Determining V IH and V IL Digital Integrated Circuits© Prentice Hall 1995 Introduction

29. Propagation Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction

30. CMOS Inverter: Transient Response Digital Integrated Circuits© Prentice Hall 1995 Introduction

31. CMOS Inverter Propagation Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction

32. Computing the Capacitances Digital Integrated Circuits© Prentice Hall 1995 Introduction

33. CMOS Inverters Polysilicon In Out Metal1 V DD GND PMOS NMOS 1.2  m =2 Digital Integrated Circuits© Prentice Hall 1995 Introduction

34. The Miller Effect Digital Integrated Circuits© Prentice Hall 1995 Introduction

35. Computing the Capacitances Digital Integrated Circuits© Prentice Hall 1995 Introduction

36. Impact of Rise Time on Delay Digital Integrated Circuits© Prentice Hall 1995 Introduction

37. Delay as a function of V DD Digital Integrated Circuits© Prentice Hall 1995 Introduction

38. Where Does Power Go in CMOS? Digital Integrated Circuits© Prentice Hall 1995 Introduction

39. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction MOS Transistors (again) l Device Equations: »Off (ignore sub-threshold): Vgs < Vt – Ids = 0 »Linear: Vgs > Vt & |Vdg|<|Vth| »Saturation:Vgs>Vt & |Vgd| > |Vth|

40. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Current Flow in an Inverter R = 100 Ohms C = 0.1 pf (100 ff)

41. Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Spice Deck *** SPICE DECK created from inv1.sim, tech=scmos M1 2 4 1 1 CMOSP L=3.0U W=6.0U M2 0 4 3 0 CMOSN L=3.0U W=6.0U R3 2 5 100 R4 3 5 100 R5 5 6 100 C6 6 0 0.1000PF *vin 4 *vout 6 vdd 1 0 dc 5v ****************V1 V2 Del Tr Tf Tpw Period vin 4 0 pulse (0v 5v 5ns 5ns 5ns 5ns 50ns)

42. Dynamic Power Dissipation Energy/transition = C L * V dd 2 Power = Energy/transition *f =C L * V dd 2 * f Need to reduce C L, V dd, andf to reduce power. VinVout C L Vdd Not a function of transistor sizes! Digital Integrated Circuits© Prentice Hall 1995 Introduction

43. Impact of Technology Scaling Digital Integrated Circuits© Prentice Hall 1995 Introduction

44. Technology Evolution Digital Integrated Circuits© Prentice Hall 1995 Introduction

45. Technology Scaling (1) Minimum Feature Size Digital Integrated Circuits© Prentice Hall 1995 Introduction

46. Technology Scaling (2) Number of components per chip Digital Integrated Circuits© Prentice Hall 1995 Introduction

47. Propagation Delay Scaling Digital Integrated Circuits© Prentice Hall 1995 Introduction

48. Technology Scaling Models Digital Integrated Circuits© Prentice Hall 1995 Introduction

49. Scaling Relationships for Long Channel Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction

50. Scaling of Short Channel Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction