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1 CS/COE0447 Computer Organization & Assembly Language Chapter 2 Part 1
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2 Topics to cover in Chapter 2 MIPS operations and operands MIPS registers Memory view Instruction encoding Arithmetic operations Logic operations Memory transfer operations
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3 MIPS Operations/Operands “Operation” (instruction) “Operand” MIPS operations –Arithmetic operations (integer/floating-point) (add, sub,…) –Logical operations (and, or,…) –Shift operations (shift a certain number of bits to the left or right) –Compare operations (do something if one operand is less than another,…) –Load/stores to transfer data from/to memory –Branch/jump operations –System control operations/coprocessor operations MIPS operands –General-purpose registers –Fixed registers, e.g., HI/LO registers –Memory location –Immediate value
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4 MIPS Arithmetic All arithmetic instructions have 3 operands –Operand order is fixed: destination first –32 registers (page 2 of green card) Examples –add $t0, $s0, $s2# $t0 = $s0 + $s2 –sub $s0, $t0, $t1# $s0 = $t0 – $t1 rd rs rt
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5 MIPS Registers r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 $zero $at $v0 $v1 $a0 $a1 $a2 $a3 $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 HI LO PC $s1 $s2 $s3 $s4 $s5 $s6 $s7 $t8 $t9 $k0 $k1 $gp $sp $fp $ra $s0 General-Purpose RegistersSpecial-Purpose Registers 32 bits
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6 General-Purpose Registers GPR: all can be used as operands in instructions Still, conventions and limitations exist to keep GPRs from being used arbitrarily –r0, termed $zero, always has a value “0” –r31, termed $ra (return address), is reserved for subroutine call/return –Etc. (we’ll see others later) –Register usage and related software conventions are summarized in “application binary interface” (ABI), which is important when writing system software such as an assembler and a compiler
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7 Instruction Encoding Instructions are encoded in binary numbers –Assembler translates assembly programs into binary numbers –Machine decodes binary numbers to figure out what the instruction is –MIPS has “fixed” 32-bit instruction encoding MIPS has several instruction formats –R-format: arithmetic instructions –I-format: transfer/branch/immediate format –J-format: jump instruction format –(FI/FR-format: floating-point instruction format)(later chapter)
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8 MIPS Instruction Formats NameFieldsComments 6 bits5 bits 6 bitsAll MIPS instructions 32 bits R-formatoprsrtrdshamtfunctArithmetic/logic instruction format I-formatoprsrtaddress/immediateTransfer, branch, immediate format J-formatoptarget addressJump instruction format
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9 R-Format Instructions Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32 655565 opcodersrtrdfunctshamt For simplicity, each field has a name: For shift instructions: “shift amount”
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10 R-Format Example MIPS Instruction: add $8,$9,$10 Binary number per field representation: Decimal number per field representation: hex representation: decimal representation: On Green Card: Format in column 1, opcodes in column 3 (Let’s look and then come back)
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11 M I P S Reference Data: CORE INSTRUCTION SET NAMEMNE- MON-IC FOR- MAT OPERATION (in Verilog) OPCODE/ FUNCT (hex) AddaddRR[rd] = R[rs] + R[rt] (1)0 / 20 hex Add ImmediateaddiIR[rt] = R[rs] + SignExtImm (1)(2) 8 hex Branch On Equal beqIif(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4) 4 hex (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0} Later
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12 R-Format Instructions (REMINDER) Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32 655565 opcodersrtrdfunctshamt For simplicity, each field has a name:
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13 R-Format Example MIPS Instruction: add $8,$9,$10 Binary number per field representation: Decimal number per field representation: Now let’s fill this in
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14 R-Format Example MIPS Instruction: add $8,$9,$10 09108320 Binary number per field representation: Decimal number per field representation: hex representation: 012A 4020 hex decimal representation: 19,546,144 ten 00000001001010100100010000000000 hex
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15 I-Format Instructions Define “fields” of the following number of bits each: 6 + 5 + 5 + 16 = 32 65516 opcodersrtimmediate For simplicity, each field has a name: Let’s do an example using addi
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16 M I P S Reference Data: CORE INSTRUCTION SET NAMEMNE- MON-IC FOR- MAT OPERATION (in Verilog) OPCODE/ FUNCT (hex) AddaddRR[rd] = R[rs] + R[rt] (1)0 / 20 hex Add ImmediateaddiIR[rt] = R[rs] + SignExtImm (1)(2) 8 hex Branch On Equal beqIif(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4) 4 hex (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}
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17 I-Format Example MIPS Instruction: addi $8,$9,7 Binary number per field representation: Decimal number per field representation:
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18 I-Format Example MIPS Instruction: addi $8,$9,7 Binary number per field representation: Decimal number per field representation: hex representation: hex FILL IN THESE VALUES!!!!!
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19 M I P S Reference Data: CORE INSTRUCTION SET NAMEMNE- MON-IC FOR- MAT OPERATION (in Verilog) OPCODE/ FUNCT (hex) AddaddRR[rd] = R[rs] + R[rt] (1)0 / 20 hex Add ImmediateaddiIR[rt] = R[rs] + SignExtImm (1)(2) 8 hex Branch On Equal beqIif(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4) 4 hex (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}
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20 addi $8,$9,7 Executing the addi instruction $8 $90x00000023 Suppose Instruction from earlier slide: format. Immediate = 0x0007 FINISH THIS!!!! So, you add 00000023 00000007
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21 Logic Instructions Bit-wise logic operations Examples –and $t0, $s0, $s2# $t0 = $s0 ^ $s2 –or $s0, $t0, $t1# $s0 = $t0 | $t1 –nor $s0, $t0, $t1# $s0 = ~($t0 | $t1) –xor $s0, $t0, $t1# $s0 = $t0 ^ $t1 NameFieldsComments R-formatoprsrtrdshamtfunctLogic instruction format
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22 Dealing with Immediates Many operations involve small “immediate value” –a = a + 1; –b = b – 4; –c = d | 0x04; Some frequently used arithmetic/logic instructions have their “immediate” version –addi $t0, $t1, 16# t0 <- $t1 + 16 –andi $t2, $t3, 254# t2 <- $t3 & 0xfe –ori $t5, $t6, 4# t5 <- $t6 | 0x04 –xori $t7, $t7, 16# t7 <- $t7 ^ 0x10 There is no “subi”; Why? NameFieldsComments I-formatoprsrt16-bit immediateTransfer, branch, immediate format
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23 Long Immediates Sometimes we need a long immediate, e.g., 32 bits –Do we need an instruction to load a 32-bit constant value to a register? MIPS requires that we use two instructions –lui $t0, 1010101001010101 Then we get lower-order 16 bits –ori $t0, $t0, 1100110000110011 10101010010101010000000000000000 10101010010101011100110000110011 $t0
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24 Memory Transfer Instructions Only two instructions provided –LOAD: move data from memory to register lw $t3, 4($t2)# $t3 <- M[$t2 + 4] –STORE: move data from register to memory sw $t4, 16($t1)# M[$t1 + 16] <- $t4 Support for other data types than 32-bit word needed –16-bit half-word “short” type in C 16-bit processing is common in signal processing lh/sh (load half/store half) –8-bit byte “char” type in C 8-bit processing is common in controller applications lb/sb (load byte/store byte)
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25 Address Calculation Memory address is specified with (register, constant) –Register to keep “base address” –Constant field to keep “offset” –Address is “base address” + “offset”, i.e., register + constant The offset can be positive or negative –It is written in terms of number of bytes for load/store instructions If no register needs to be used then use register 0 –Register 0 always stores value 0 (“hardwired”) If no offset, then offset is 0 MIPS uses this simple address calculation method, but other architectures such as PowerPC or x86 have different methods
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26 Machine Code Example swap: sll$t0, $a1, 2 add$t1, $a0, $t0 lw$t3, 0($t1) lw$t4, 4($t1) sw$t4, 0($t1) sw$t3, 4($t1) jr$ra void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; }
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27 Memory View Viewed as a large, single-dimension 8-bit array with an address (“byte address”) A memory address is an index into the array BYTE 0 1 2 3 4 5 …
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28 Memory Organization 2 32 bytes with byte addresses from 0 to 2 32 – 1 2 30 words with byte addresses 0, 4, 8, …, 2 32 – 4 Words are aligned –2 least significant bits of address are 0s Half-words are aligned –LSB of address is 0 Addressing within a word –Which byte is first and which byte is last? –Big-endian vs. Little-endian WORD 0 4 8 12 16 20 … 0123 0123 0 0 LSBMSB LSBMSB
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29 What C code properly fills in the blank in loop on right? 1: A[i++] >= 10 2: A[i++] >= 10 | A[i] = 10 || A[i++] = 10 || A[i] = 10 && A[i++] < 0 6 None of the above Peer Instruction: $s3=i, $s4=j, $s5=@A do j = j + 1 while (______); Loop:addiu $s4,$s4,1# j = j + 1 sll $t1,$s3,2# $t1 = 4 * i addu $t1,$t1,$s5# $t1 = @ A[i] lw $t0,0($t1)# $t0 = A[i] slti $t1,$t0,10 # $t1 = $t0 < 10 beq $t1,$0, Loop # goto Loop [not delayed] addiu $s3,$s3,1# i = i + 1 slti $t1,$t0, 0 # $t1 = $t0 < 0 bne $t1,$0, Loop # goto Loop [not delayed]
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30 What C code properly fills in the blank in loop on right? 1: A[i++] >= 10 2: A[i++] >= 10 | A[i] = 10 || A[i++] = 10 || A[i] = 10 && A[i++] < 0 6: None of the above Peer Instruction: $s3=i, $s4=j, $s5=@A do j = j + 1 while (______); Loop:addiu $s4,$s4,1# j = j + 1 sll $t1,$s3,2# $t1 = 4 * i addu $t1,$t1,$s5# $t1 = @ A[i] lw $t0,0($t1)# $t0 = A[i] slti $t1,$t0,10 # $t1 = $t0 = 10) addiu $s3,$s3,1# i = i + 1 slti $t1,$t0, 0 # $t1 = $t0 < 0 bne $t1,$0, Loop # goto Loop if $t1 != 0 ($t0 < 0)
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31 Peer Instruction Which instruction has same representation as 35 ten ? A. add $0, $0, $0 B. subu $s0,$s0,$s0 C. lw $0, 0($0) D. addi $0, $0, 35 E. subu $0, $0, $0 F. Trick question! Instructions are not numbers Use Green Card handout to answer
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32 Peer Instruction Which instruction has same representation as 35 ten ? A. add $0, $0, $0 B. subu $s0,$s0,$s0 C. lw $0, 0($0) D. addi $0, $0, 35 E. subu $0, $0, $0 F. Trick question! Instructions are not numbers Registers numbers and names: 0: $0, 8: $t0, 9:$t1,..15: $t7, 16: $s0, 17: $s1,.. 23: $s7 Opcodes and function fields (if necessary) add : opcode = 0, funct = 32 subu : opcode = 0, funct = 35 addi : opcode = 8 lw : opcode = 35 opcodersrtoffset rdfunctshamt opcodersrt opcodersrtimmediate rdfunctshamt opcodersrt rdfunctshamt opcodersrt
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33 Peer Instruction Which instruction bit pattern = number 35? A. add $0, $0, $0 B. subu $s0,$s0,$s0 C. lw $0, 0($0) D. addi $0, $0, 35 E. subu $0, $0, $0 F. Trick question! Instructions != numbers Registers numbers and names: 0: $0, 8: $t0, 9:$t1, …,16: $s0, 17: $s1, …, Opcodes and function fields add : opcode = 0, function field = 32 subu : opcode = 0, function field = 35 addi : opcode = 8 lw : opcode = 35 35000 0320 000 80035 16350 016 0350 000
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34 More on Alignment A misaligned access –lw $t1, 3($zero) How do we define a word at address 3? –Data 0, 1, 2, 3 If you meant this, use address 0 instead of 3 –Data 3, 4, 5, 6 If you meant this, it is misaligned! Certain hardware may support this, but usually not Get a byte from address 3, a word from address 4 and manipulate data to get what you want Alignment issue does not exist for byte accesses … 0123 111098 0 47654 8
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35 Shift Instructions Bit-wise logic operations Examples –sll $t0, $s0, 4# $t0 = $s0 << 4 –srl $s0, $t0, 2# $s0 = $t0 >> 2 Shift amount can be in a register (“shamt” field not used) Shift right arithmetic (SRA) keeps the sign of a number –sra $s0, $t0, 4 NameFieldsComments R-formatop NOT USED rtrdshamtfunctshamt is “shift amount”
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36 Control Decision-making instructions –Alter the control flow, i.e., change the “next” instruction to be executed MIPS conditional branch instructions –bne $t0, $t1, LABEL –beq $t0, $t1, LABEL Example bne $s0, $s1, LABEL add $s3, $s0, $s1 LABEL: … if (i == h) h =i+j; (i == h)? h=i+j; LABEL: YESNO
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37 Control, cont’d MIPS unconditional branch instruction (jump) –j LABEL Example –f, g, and h are in registers $s3, $s4, and $s5 bne $s4, $s5, ELSE add $s3, $s4, $s5 j EXIT ELSE: sub $s3, $s4, $s5 EXIT: … if (i == h) f=g+h; else f=g–h; (i == h)? f=g+h; YESNO f=g–h EXIT
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38 Control, cont’d Loops –“while” loops Example on page 74 –“for” loops
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39 Control, cont’d We have beq and bne; what about branch-if-less-than? –slt Can you make a “pseudo” instruction “blt $s1, $s2, LABEL”? Assembler needs a temporary register to do this –$at is reserved for this purpose slt $t0, $s1, $s2 if (s1<s2) t0=1; else t0=0;
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40 Instruction Format Address in the instruction is not a 32-bit number – it’s only 16-bit –The 16-bit immediate value is in signed, 2’s complement form Addressing in branch instructions –The 16-bit number in the instruction specifies the number of “instructions” to be skipped –Memory address is obtained by adding this number to the PC –Next address = PC + 4 + sign_extend(16-bit immediate << 2) Example –beq $s1, $s2, 100 Branch/ Immediate oprsrt16-bit immediate 4171825
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41 Instruction Format, cont’d The address of next instruction is obtained by concatenating with PC –Next address = {PC[31:28],IMM[25:0],00} –Address boundaries of 256MB Example –j 10000 Jumpop26-bit immediate 22500
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42 MIPS Addressing Modes Immediate addressing (I-format) Register addressing (R-/I-format) Base addressing (load/store) [register + offset] PC-relative addressing (beq/bne) [PC + 4 + offset] Pseudo-direct addressing (j) [concatenation w/ PC] oprsrt funct immediate 26-bit address oprsrtimmediate oprsrtrdshamt oprsrtoffset oprsrtoffset op
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43 Summary
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44 Register Usage Convention NAMEREG. NUMBERUSAGE $zero0zero $at1reserved for assembler usage $v0~$v12~3values for results and expression eval. $a0~$a34~7arguments $t0~$t78~15temporaries $s0~$s716~23temporaries, saved $t8~$t924~25more temporaries $k0~$k126~27reserved for OS kernel $gp28global pointer $sp29stack pointer $fp30frame pointer $ra31return address
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45 Stack and Frame Pointers Stack pointer ($sp) –Keeps the address to the top of the stack –$29 is reserved for this purpose –Stack grows from high address to low –Typical stack operations are push/pop Procedure frame –Contains saved registers and local variables –“Activation record” Frame pointer ($fp) –Points to the first word of a frame –Offers a stable reference pointer –$30 is reserved for this –Some compilers don’t use $fp
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46 “C Program” Down to “Numbers” swap: muli$2, $5, 4 add$2, $4, $2 lw$15, 0($2) lw$16, 4($2) sw$16, 0($2) sw$15, 4($2) jr$31 void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } 00000000101000010… 00000000000110000… 10001100011000100… 10001100111100100… 10101100111100100… 10101100011000100… 00000011111000000… compiler assembler
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47 To Produce an Executable source file.asm/.s source file.asm/.s source file.asm/.s object file.obj/.o object file.obj/.o object file.obj/.o library.lib/.a executable.exe assembler linker
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48 An Assembler Expands macros –Macro is a sequence of operations conveniently defined by a user –A single macro can expand to many instructions Determines addresses and translates source into binary numbers –Start from address 0 –Record in “symbol table” addresses of labels –Resolve branch targets and complete branch instructions’ encoding –Record instructions that need be fixed after linkage Packs everything in an object file “Two-pass assembler” –To handle forward references
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49 An Object File Header –Size and position of other pieces of the file Text segment –Machine codes Data segment –Binary representation of the data in the source Relocation information –Identifies instructions and data words that depend on absolute addresses Symbol table –Keeps addresses of global labels –Lists unresolved references Debugging information –Contains a concise description of the way in which the program was compiled
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50 Assembler Directives Guides the assembler to properly handle following codes with certain considerations.text –Tells assembler that codes follow.data –Tells assembler that data follow.align –Directs aligning the following items.global –Tells to treat the following symbol as global.asciiz –Tells to handle the following as a “string”
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51 Code Example.text.align2.globlmain main: subu$sp, $sp, 32 … loop: lw$t6, 28($sp) … la$a0, str lw$a1, 24($sp) jalprintf … jr$ra.data.align0 str:.asciiz“The sum from 0 … 100 is %d\n”
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52 Macro Example.data int_str:.asciiz“%d”.text.macroprint_int($arg) la $a0, int_str mov $a1, $arg jal printf.end_macro … print_int($7) la $a0, int_str mov $a1, $7 jal printf
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53 Linker
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54 Procedure Calls Argument passing –First 4 arguments are passed through $a0~$a3 –More arguments are passed through stack Result passing –First 2 results are passed through $v0~$v1 –More results can be passed through stack Stack manipulations can be tricky and error-prone More will be discussed in recitations
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55 SPIM
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56 High-Level Lang. vs. Assembly High-level languageAssembly Example C, Fortran, Java, …- + High productivity – Short description & readability Portability Low productivity – Long description & low readability Not portable – Limited optimization capability in certain cases With proper knowledge and experiences, fully optimized codes can be written
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57 Interpreter vs. Compiler InterpreterCompiler Concept Line-by-line translation and execution Whole program translation and native execution Example Java, BASIC, …C, Fortran, … + Interactive Portable (e.g., Java Virtual Machine) High performance – Low performance Binary not portable to other machines or generations
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58 Compiler Structure Compiler is a software with a variety of functions implemented inside it –Front-end Deals with high-level language constructs and translates them into more relevant tree-like or list-format internal representation (IR) Symbols (e.g., a[i+8*j]) are still available –Back-end Back-end IR that more or less correspond to machine instructions With more steps, IR becomes machine instructions
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59 Compiler Structure, cont’d Front-end –Scanning Takes the input source program and chops the programs into recognizable “tokens” Also known as “lexical analysis” and “LEX” tool is used –Parsing Takes the token stream, checks the syntax, and produces abstract syntax trees “YACC” or “BISON” tools are used –Semantic analysis Takes the abstract syntax trees, performs type checking, and builds a symbol table –IR generation Similar to assembly language program, but assumes unlimited registers, etc.
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60 Compiler Structure, cont’d Back-end –Local optimization Optimizations within a basic block Common Sub-expression Elimination (CSE), copy propagation, constant propagation, dead code elimination, … –Global optimization Optimizations that deal with multiple basic blocks –Loop optimizations Loops are so important that many compiler and architecture optimizations target them Induction variable removal, loop invariant removal, strength reduction, … –Register allocation Try to keep as many variables in registers as possible –Machine-dependent optimizations Utilize any useful instructions provided by the target machine
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61 Code Example (AST) while (save[i] == k) i+=1;
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62 Code Example (IR)
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63 Code Example (CFG)
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64 Code Example (CFG), cont’d
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65 Code Example (Reg. Alloc.)
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66 Compiler Example gcc (GNU open-source C Compiler) –cpp: C pre-processor Macro expansion (#define) File expansion (#include) Handles other directives (#if, #else, #pragma) –cc1: C compiler (front-end & back-end) Compiles your C program –gas: assembler Assembles compiler-generated assembly codes –ld: linker Links all the object files and library files to generate an executable
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67 Optimization and Compile Time Optimizations are a must –Code quality is much improved - 2 ~ 10 times improvement is not uncommon Turning on optimizations can incur a significant compile time overhead –For a big, complex software project, compile time is an issue –Not that serious in many cases as compiling is a rare event compared to program execution –Considering the resulting code quality, you pay this fee –Now, computers became fast!
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68 Building a Compiler A modern compiler is a very complex software tool –Need a very careful design of data structures –All good software engineering techniques applied Traditional tools to create a compiler –LEX –YACC/BISON Start from existing open-source compilers –LCC –GCC –There are many other research prototypes! If you are interested in compiler technologies –CS1621 – Structure of Programming Languages –CS1622 – Introduction to Compiler Design
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69 Summary Operations and operands In MIPS assembly language –Registers replace C variables –One instruction (simple operation) per line Some lessons –Simpler is better e.g., A few instruction formats vs. many complex instruction formats –Smaller is faster e.g., 32 GPRs vs. 128 GPRs Instructions –Arithmetic –Logic –Memory transfer
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