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Control Processor Switch Fabric ATM Switch Core Port Processors FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP.

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Presentation on theme: "Control Processor Switch Fabric ATM Switch Core Port Processors FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP."— Presentation transcript:

1 Control Processor Switch Fabric ATM Switch Core Port Processors FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP FPX SPC LC IPPOPP Line Cards (link interfaces)

2 Control Processor Switch Fabric... Flow/Route Lookup Dist. Q. Ctl. Output Port Proc. Flow Lookup Input Port Proc. Flow/Route Lookup Dist. Q. Ctl. Flow Lookup

3 PP PCU WUGS lookup DQ lookup plugin PP PCU kernel CP - Control Processor RA - Route Agents DQ - Distributed Queuing PP - Port Processor PCU - Plugin Control Unit WUGS - Washington University Gigabit Switch PP DQ Configure Resource Signaling Discover (switch & ports) RM CP flexroutd Routing RA OSPF Virtual Interfaces framework

4 Overall View Control Processor Switch Fabric ATM Switch Core Port Processors PP LC PP LC PP LC PP LC PP LC PP LC Line Cards (link interfaces)

5 APIC IP Classifier DQ Module NID X.1 Z.2 shim Active processing SPC FPX Flow Control Shim contains results of classification step

6 SPC/FPX IP WUGS SPC/FPX CP router Control Traffic

7 CP Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop wugs P0 P1 P2 P3 P4 P5 P6 P7 192.168.200.X 192.168.201.X 192.168.202.X 192.168.203.X 192.168.204.X 192.168.205.X 192.168.206.X 192.168.207.X SPC/FPX DQ 192.168.203.2 192.168.202.2 IP fwd 192.168.200.2 192.168.204.2

8 Input 1 Input 2... Input N Prev Hop Output 1 Output 2... Output N Next Hop interrupt APIC HW DQ Callback (rt-clock, 100usec) SPC Kernel Control Device Specific Processing Command/ kernel Flow/Route lookup Active Processing Environment (swint) User Space Distributed Queuing (DQ) Basic IP set pacing PCU APIC HW active pkt

9 SW Interrupt Exact Match Classifier APIC interrupt Resource Manager X.1 Y.1 Z.1 W.1 IP options X.2Y.1 Z.2... Output 1 Output 2 Output N APIC Next Hop HML HMLHML User Kernel swintr Distributed Queuing Plugin Control Unit... Input 1 Input 2 Input N Prev Hop HML H M L HML Default Output path to Next Hop Flow Control Basic IP Processing (TTL, version, addr, options chk) SPC APIC Driver Default Input port path

10 SPC/FPX 2xx Port 1 lookup out 40 43 42 44 43 44 42 40 50 51 50 51 Port 2 Port 4 Port 3 CP ATM Switch Port 3 Port 0 Port 1 Port 2 R R Host VC=50 VC=51

11 SPC/FPX IP WUGS SPC/FPX CP router IP Loopbacks not shown IP Address bound to Ports VP0VP1VP2VP3VP4 Virtual Interfaces, Or Virtual Ports (VP) 50 201202203204 63 Port 1 Port 2 Port 3 Port 4 Port 0 IP (udp/tcp) RA IP layer: routes pkts to/from sockets Sockets: comm endpoints Driver: routes pkts between interface and net layer

12 CP Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop Next/Prev Hop wugs P0 P1 P2 P3 P4 P5 P6 P7 192.168.200.X 192.168.201.X 192.168.202.X 192.168.203.X 192.168.204.X 192.168.205.X 192.168.206.X 192.168.207.X SPC/FPX DQ 192.168.203.2 192.168.202.2 IP fwd

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14 Port 2 Port 0 Port 3 CP SPC/FPX 2xx Port 1 lookup out 40 43 42 44 43 44 42 40 SPC/FPX 2xx Port 2 lookup out 40 43 42 44 43 44 42 40 LC


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