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1 Global Routing Method for 2-Layer Ball Grid Array Packages Yukiko Kubo*, Atsushi Takahashi** * The University of Kitakyushu ** Tokyo Institute of Technology
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2 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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3 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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4 Old package design Circuits were small Number of I/O terminals of packages was small -> Terminals were put on perimeter of package board Radial routing Manual design or simple automatic design Introduction
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5 Recent package design Circuits are large Number of I/O terminals of packages is large Ball Grid Array (BGA) Routing design is difficult Reduction of design term Routing automation Introduction Ball Grid Array
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6 Previous Works for BGA Package Design Net generation and global routing (single layer) Yu and Dai [ICCAD95] Shibata etc. [JIEP97](in Japanese) Layer Assignment and single layer routing Tsai, Wang and Chen [TCAD98] Chen, Chen, Tsai and Chen [ICCD99] Existing algorithms are for single layer routing Global routing method for 2-layer BGA packages is proposed
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7 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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8 Our target Route on layer1 Route on layer2 via Ring wire for plating Plating lead Target: 2-layer BGA package with plating leads Plating lead: a wire connecting outer ring to plate wires Finger (on layer1): connecting BGA board and chip Ball (on layer2): connecting BGA board and PCB Net: 2-terminal (a finger and a ball) with plating lead chip ball finger ball finger via
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9 Via assignment Vias are on grid array: Radius of vias are large for ball pitch = At most one via is allowed between four adjacent balls
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10 Routing strategy: Monotonic routing 4 13 2 5 6 1 2 3 4 5 6 5 13 2 4 6 5 13 2 4 6 Monotonic routing Non-monotonic routing Monotonic Routing: never snakes in horizontal direction crosses any horizontal line at most once
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11 Condition for Monotonic Routing 4 13 2 5 6 1 2 3 4 5 6 Monotonic routing is possible if and only if via assignment is monotonic Monotonic via assignment: Net labels of vias on each row are subsequence of net labels of fingers In monotonic via assignment, Monotonic global routes are determined uniquely Global routing = Monotonic via assignment
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12 Routing Strategy: Routes on Each Layer Layer1: Monotonic routes with plating tales Via assignment is monotonic Global routes are determined uniquely Layer2: Short routes Each via is put near corresponding ball 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 038 91 5 67 Layer1 Layer2
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13 Evaluation of Routes Via assignment is monotonic -> Global routes can be determined uniquely Global routes are evaluated by via assignment Evaluation: wire length (layer1), wire length (layer2) and wire congestion 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 038 91 5 67
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Evaluation: Wire Length Wire length (Layer1): the number of crosses of vertical grid line and global routes Monotonic routes If wire length is long, = routes snake = routes cross vertical grid line 41110 14 165713 0381292 2 5 2 4 12 13 10 11 14 038 91 5 67 Len:0 Len:2
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15 Evaluation: wire length Wire Length (Layer2): Manhattan distance between a ball and a via 5 2 2 5 2 5 Len:1 Len:2
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16 Evaluation: Wire congestion Routing failure occurs = Congestion is dense = Congestion is not ballanced Congestion evaluation: Sum of difference of adjacent congestion 41110 14 165713 0381292 2 4 13 10 11 14 038 91 5 67 Congestion between adjacent 2 vias : Reciprocal of wire pitch Congestion: 5Congestion: 3 Difference of congestion: |3-5|=2
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17 Problem Definition 2-Layer BGA Package Routing Input: 2-terminal nets (pair of a ball and a finger) Output: Global routes including vias Objective: To minimize Cost=a*wire length(layer1) + b*wire length(layer2) + c*wire congestion Constraints: Monotonic via assignment Plating leads
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18 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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19 Routing Optimization Approach Greedy algorithm 1.Give initial via assignment 2.Select via-assignment modification with maximum gain under monotonic constraint 3.If maximum gain > 0, apply the modification and go to 2
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20 Routing Optimization Approach Greedy algorithm 1.Give initial via assignment 2.Select via-assignment modification with maximum gain under monotonic constraint 3.If maximum gain > 0, apply the modification and go to 2
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21 Initial via assignment Vias are generated according to ball sequences Each via sequence is divided into monotonic sub- sequences Vias of sub-sequences for same ball sequence are put on different rows of via grid array 41110 14 165713 0381292 0, 1, …, 14 4 13 1011 12 14 03829 1567
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22 Initial via assignment Vias are generated according to ball sequence Each via sequences are divided into monotonic sub- sequences Vias of sub-sequences for same ball sequence are put on different rows of via grid array 41110 14 165713 0381292 0, 1, …, 14 4 13 10 11 12 14 038 29 1 5 67 Vias of sub-sequences in different ball sequences can share same row of via grid array
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23 Initial via assignment Vias are generated according to ball sequence Each via sequences are divided into monotonic sub- sequences Vias of sub-sequences for same ball sequence are put on different rows of via grid array 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 038 91 5 67 4 13 10 11 12 14 038 29 1 5 67 Vias of sub-sequences in different ball sequence can share same row of via grid array
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24 Routing Optimization Approach Greedy algorithm 1.Give initial via assignment 2.Select via-assignment modification with maximum gain under monotonic constraint 3.If maximum gain > 0, apply the modification and go to 2
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25 Via assignment modification Modification patterns 2-via exchange 3-via rotation Sequential via movement
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26 2-via exchange, 3-via rotation u k d j i l 2-via exchange u k d j i l 3-via rotation 2-via exchange: Adjacent 2 vias are exchanged 3-via rotation: 3 vias on a unit grid are rotated
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27 Sequential via movement Vias are moved to their adjacent grid one by one without overlaps 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 038 91 5 67
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28 Complexity Modification with maximum gain enumerating all modifications calculating the gain of them Complexity to obtain modification with maximum gain (n: number of nets) 2-via exchange: O(n) 3-via rotation: O(n) Sequential via movement: O(n 2 ) Total: O(n 2 )
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29 Routing Optimization Approach Greedy algorithm 1.Give initial via assignment 2.Select via-assignment modification with maximum gain under monotonic constraint 3.If maximum gain > 0, apply the modification and go to 2
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30 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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31 Experiments Proposing method is implemented by C++ CPU 3GHz, 1GB memory Cost function: length(layer1) + length(layer2) + congestion ( a = b = c = 1 ) Comparison: ALL (Proposing method): 2-via exchange, 3-via rotation, and sequential via movement SEQ: Sequential via movement only
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32 Experimental results dataALLSEQ 116.71.0 24.70.3 31.90.2 45.70.6 55.50.4 ALL generates better routes than SEQ ALL takes much more time than SEQ Tradeoff between quality of solution and calculation time Calculation Time (s)
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33 Experimental result (data3) Length(layer1):252→ 53 Length(layer2):160→193 Congestion:414.3→129.8 Time(s):1.90 (sec)
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34 Contents Introduction Problem Definition and Strategy Global Routing Method Experiments Conclusion
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35 Conclusion Global routing method for 2-layer BGA packages was proposed Monotonic routing was introduced Global routing method by monotonic via assignment was proposed The method gives initial via assignment and improve it by via assignment modification Experimental results Our method generates good global routes Tradeoff between quality of solution and calculation time
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36 Future work Reduction of calculation time without degrading solution Accurate design rule consideration for both layer1 and layer2 Plating leads planning Whether is the plating lead of each net routed on Layer1 or Layer2?
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37 BGA Package Design Consideration Multi-layer routing Obstacles Plating lead Chip scale package Multi-chip on board Electrical effects board Au bonding wire die solder ball bonding finger
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38 Evaluation: Wire length on layer1 41110 14 165713 0381292 2 4 13 10 11 14 038 91 5 67 len: 1 len: 3
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39 Many obstacles on layer2 For short routes Little obstacles on layer1 For long routes Plating leads is on layer1 Routes distribution Layer1 Layer2
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40 Sequential via movement 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 038 91 5 67 41110 14 165713 0381292 0, 1, …, 14 2 4 12 13 10 11 14 03 8 91 5 6 7 Layer1: Layer2: Congestion:
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41 Local change of the cost Local change of cost is possible to calculate if Adjacent vias of the target via are known Two previous vias and a next via in the movement are known Sum of local change of cost = gain u k d j i l k j d i * l The direction of movement is restricted to {right, left} or {above, below}
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42 Cost graph Nodes : target via and two previous vias Edges : the direction of next via u k d j i l j, k, u j, k, l j, k, d i, j, k
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43 Cost graph j, k, u j, k, l j, k, d k, u, a k, u, b k, l, b … u k d j i l a b c i, j, k Nodes : target via and two previous vias Edges : the direction of next via Weight of edges are local change of cost
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44 Cost graph Directed acyclic graph Calculate longest path Longest path = sequential movement with maximum gain Sequential via movement with maximum via is selected For all starting nodes, Generate cost graph Search longest path Select path with maximum gain among all
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45 Experimental results initialoutput data#netlen1len2congCostlen1len2congCostimp. (%) #modtime (s) 1 31617531635684786359174619275416.7 2 19241819262012308924821254955624.7 3 1602521604148265319313037655611.9 4 1602501684358536722915845447765.7 5 1602711644068416322112140552625.5
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46 Experimental results Comparison ALL: Proposing method SEQ sequential via movement only Via movement starts with via of large cost ALLSEQ dataimp.timeimp.time 12716.7241.0 2554.7500.3 3551.9540.2 4475.7460.6 5525.5470.4
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47 Our Strategy Strategy: Layer1: Monotonic routes with plating leads Layer2: Short routes Layer1 Layer2
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