1. Digital Logic Structures

2. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-2 Roadmap Problems Algorithms Language Machine (ISA) Architecture Microarchitecture Logic Circuits Devices

3. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-3 Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium II: 7 million Compaq Alpha 21264: 15 million Intel Pentium III: 28 million Logically, each transistor acts as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexor, decoder, register, … Combined to build processor LC-2

4. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-4 Simple Switch Circuit Switch open: No current through circuit Light is off V out is +2.9V Switch closed: Short circuit across switch Current flows Light is on V out is 0V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage.

5. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-5 N-type MOS Transistor MOS = Metal Oxide Semiconductor two types: N-type and P-type N-type when Gate has positive voltage, short circuit between #1 and #2 (switch closed) when Gate has zero voltage, open circuit between #1 and #2 (switch open) Gate = 1 Gate = 0 Terminal #2 must be connected to GND (0V).

6. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-6 P-type MOS Transistor P-type is complementary to N-type when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 Gate = 0 Terminal #1 must be connected to +2.9V.

7. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-7 Logic Gates Use switch behavior of MOS transistors to implement logical functions: AND, OR, NOT. Digital symbols: recall that we assign a range of analog voltages to each digital (logic) symbol assignment of voltage ranges depends on electrical properties of transistors being used  typical values for "1": +5V, +3.3V, +2.9V  from now on we'll use +2.9V

8. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-8 CMOS Circuit Complementary MOS Uses both N-type and P-type MOS transistors P-type  Attached to + voltage  Pulls output voltage UP when input is zero N-type  Attached to GND  Pulls output voltage DOWN when input is one For all inputs, make sure that output is either connected to GND or to +, but not both!

9. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-9 Inverter (NOT Gate) InOut 0 V2.9 V 0 V InOut 01 10 Truth table

10. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-10 NOR Gate ABC 001 010 100 110 Note: Serial structure on top, parallel on bottom.

11. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-11 OR Gate Add inverter to NOR. ABC 000 011 101 111

12. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-12 NAND Gate (AND-NOT) ABC 001 011 101 110 Note: Parallel structure on top, serial on bottom.

13. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-13 AND Gate Add inverter to NAND. ABC 000 010 100 111

14. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-14 Basic Logic Gates

15. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-15 More than 2 Inputs? AND/OR can take any number of inputs. AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR. Can implement with multiple two-input gates, or with single CMOS circuit.

16. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-16 Practice Implement a 3-input NOR gate with CMOS.

17. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-17 Decoder n inputs, 2 n outputs exactly one output is 1 for each possible input pattern 2-bit decoder

18. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-18 Multiplexer (MUX) n-bit selector and 2 n inputs, one output output equals one of the inputs, depending on selector 4-to-1 MUX

19. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-19 Full Adder Add two bits and carry-in, produce one-bit sum and carry-out. ABC in SC out 00000 00110 01010 01101 10010 10101 11001 11111

20. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-20 Four-bit Adder

21. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-21 On-Chip Memory: Static RAM 6-Transistor SRAM Cell bit word (row select) bit word 10 01

22. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-22 RAM :Transistor Memory Cell (DRAM) Single transistor Density is better than SRAM Slower Call D-RAM (Dynamic RAM) Refresh- do a periodic read to every cell row select bit

23. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-23 Classical DRAM Organization (square) rowdecoderrowdecoder row address Column Selector & I/O Circuits Column Address data RAM Cell Array word (row) select bit (data) lines Row and Column Address together: Select 1 bit a time Each intersection represents a 1-T DRAM Cell