1. Introduction to Computer Organization and Architecture
Lecture 1
By Juthawut Chantharamalee

2. Introduction to Computer Organization and Architecture
Description
Course Outline
Administrative
Brief History of Computers
Overview of Computer Organization
Overview of Computer Performance
Case Study: Intel Processors
Introduction to Computer Organization and Architecture

3. Introduction to Computer Organization and Architecture
Description from ISIS
Basic concepts; computer evolution, register transfer level design, simulation techniques, instruction sets (CISC and RISC), assembly language programming, ALU design, arithmetic algorithms and realization of arithmetic functions, hardwired and micro-programmed control, memory hierarchies, virtual memory, cache memory, interrupts and DMA, input/output; introduction to high-performance techniques, pipelining, multiprocessing; introduction to hardware description languages (Verilog, VHDL); students design and simulate a simple processor.
Introduction to Computer Organization and Architecture

4. Introduction to Computer Organization and Architecture
Course Outline
Introduction [chap 1] (2)
Brief History
Overview of Computer Organization
Architecture: Instruction Set Design [chap 2] (6)
Information representation & arithmetic operations
Instruction Formats, Addressing Modes
Assembly language Programming
Basic input/output operations
Subroutine linkage
Introduction to Computer Organization and Architecture

5. Introduction to Computer Organization and Architecture
Course Outline, cont’d
Case Studies of Instruction Set Architecture [chap. 3] (4)
Motorola M68000
ARM
Intel Pentium
Computer Arithmetic and ALU Design [chap. 6] (6)
Addition (Subtraction)
Multiplication (Division)
Shifting and Rotating
Floating Point Arithmetic
Introduction to Computer Organization and Architecture

6. Introduction to Computer Organization and Architecture
Course Outline, cont’d
Verilog / VHDL Tutorials [Supplemental material] (6)
Memory [chap 5] (6)
Semiconductor Memory Technology
Cache Memory
Virtual Memory
Memory Management and Case Studies
Introduction to Computer Organization and Architecture

7. Introduction to Computer Organization and Architecture
Course Outline, cont’d
Processor Design [chap 7] (6)
Datapath design
Control Unit Design
Microprogramming
Exception Handling
Input/Output [chap 4] (4)
Device Interfacing and Addressing
Interrupts
Bus Design
Additional topics [selected from chapters 8-12]
Introduction to Computer Organization and Architecture

8. Introduction to Computer Organization and Architecture
Administrative
Lectures
Time: M/W/F 8:30 - 9:20 AM
Room: 4030 SC
Instructor
James Maxted:
Design engineer for Rockwell Collins (35 years)
Office: 1126 SC, hours M/W/F 9: :20 AM TA
Dakai Jin:
Office: 1313 SC, hours
Introduction to Computer Organization and Architecture

9. Administrative (cont’d)
Grading
Approximately 1 homework per week
1 multi-part project
2 exams (1 mid-term, final)
Weighting
Attendance 10%
Project and Assignment 40%
Midterm 20%
Final 30%
Introduction to Computer Organization and Architecture

10. Administrative (cont’d)
Course webpage
Place to find syllabus, lecture notes, homework, etc
Project
Design and simulate a simple processor
Mentor Graphics tools
VerilogHDL
Introduction to Computer Organization and Architecture

11. Administrative (cont’d)
Collaboration
Discussion of the material is encouraged, but…
All students are expected to do their own work
Disabilities
Please contact me (office hours or )
Introduction to Computer Organization and Architecture

12. Brief History of Computers
Computing Aids
Abacus and Counters
Abacus: Greek for board or slab
Probably originated in Middle East
Invented years ago
Napier’s Rods (Bones)
Assisted multiplication, square roots, and cube roots
Invented around 1600
Chalk Board
Interest Table
Shows interest for varying principles and periods of time
Napier --also logarithms and the chessboard calculator
Often thought to be the inventor of the slide rule (based on algorithms)
Oughtred the inventor of the multiplying slide rule but the additive existed before
Introduction to Computer Organization and Architecture 4

13. Brief History of Computers
Machines that Calculate or Control
Adding machines
Blaise Pascal’s “Pascaline”
1642
Automatic loom
Punch cards used to control a manufacturing process
1800
Cash register
“Incorruptible cashier”
1900
Napier --also logarithms and the chessboard calculator
Often thought to be the inventor of the slide rule (based on algorithms)
Oughtred the inventor of the multiplying slide rule but the additive existed before
Introduction to Computer Organization and Architecture 4

14. Brief History of Computers
Electromechanical Devices
Hollerith 1890 Census Tabulator
Punch, tabulator and sorting box
International Business Machines (IBM)
Accounting Machines
Changed circuits by moving cables in plugboards
Early 1900s
Ciphering and deciphering
Encode and decode secret messages during World War II
Enigma and Bombe
Napier --also logarithms and the chessboard calculator
Often thought to be the inventor of the slide rule (based on algorithms)
Oughtred the inventor of the multiplying slide rule but the additive existed before
Introduction to Computer Organization and Architecture 4

15. Brief History of Computers
Electronic Computers
Vacuum tube
ENIAC: 17,000 tubes, 30 tons, 1800 ft2
1945
Transistor
IBM System/360 Family
Compatible processors, Standardized peripherals and connections
1962
Integrated circuit
IBM PC
Intel 8088
1981
Napier --also logarithms and the chessboard calculator
Often thought to be the inventor of the slide rule (based on algorithms)
Oughtred the inventor of the multiplying slide rule but the additive existed before
Introduction to Computer Organization and Architecture 4

16. Introduction to Computer Organization and Architecture
Brief History of Computers
The First Programmer
Ada Augusta or Charles Babbage
Robert Campbell, Richard Bloch, Grace Murray Hopper, or Howard Aiken
Introduction to Computer Organization and Architecture 5

17. Introduction to Computer Organization and Architecture
John von Neumann - IAS
vN in front of the IAS -- his version of the EDVAC
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18. von Neumann Architecture
Sequential operation
Automatic (without human intervention)
Five elements:
Input
Output
Memory
Arithmetic Unit
Control
But von Neumann’s original design (see next slide for reference) discussed the concept of parallel computation, independent units synchronizing their work, and did not restrict the computer to sequential execution.
Five elements -- Lee’s law of computing -- everything in CS can be grouped in five-tuples -- corollary -- if not fix it.
Introduction to Computer Organization and Architecture 10

19. Revised von Neumann Architecture
But von Neumann’s original design (see next slide for reference) discussed the concept of parallel computation, independent units synchronizing their work, and did not restrict the computer to sequential execution.
Five elements -- Lee’s law of computing -- everything in CS can be grouped in five-tuples -- corollary -- if not fix it.
Introduction to Computer Organization and Architecture 10

20. The Stored Program Concept
Programming the Harvard Mark I was by external paper tape
The ENIAC was “programmed” by rewiring it completely!
The potential authors were J. Presper Eckert, John Mauchly, Arthur Burks, Herman Goldstine, and others. Von Neumann was just drafting the report!
1982 meeting in Houston -- discussion of concept -- Eckert, Goldstine, Wilkes, Clippinger
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21. The First Business Computer
LEO — Lyons Electronic Office — 1950
Modeled after the EDSAC
UNIVAC — Universal Automatic Computer — 1951 for the Census Bureau
Perhaps the first mass produced machine
ERMA — Electronic Recording Means of Accounting —1957 for Bank of America
LEO sold only a few (in England)
UNIVAC sold 46 through 1958
ERMA included since it was the first machine to be primarily designed for banking AND introduced MICR (Magnetic Ink Character Recognition) and use of checks as DP documents.
Introduction to Computer Organization and Architecture 13

22. Introduction to Computer Organization and Architecture
The First Bug
Introduction to Computer Organization and Architecture 14

23. Introduction to Computer Organization and Architecture
Basic functional units of a computer
I/O
Processor
Output
Memory
Input
and
Arithmetic
logic
Control
Introduction to Computer Organization and Architecture

24. Introduction to Computer Organization and Architecture
Connections between the processor and the memory
Processor
Memory PC IR
MDR
Control
ALU R n 1 -
MAR
general purpose
registers
Introduction to Computer Organization and Architecture

25. Introduction to Computer Organization and Architecture
Single-bus structure
Input
Output
Memory
Processor
Introduction to Computer Organization and Architecture

26. Introduction to Computer Organization and Architecture
Sharing the processor
Printer
Disk
Program
routines OS
Time t 1 2 3 4 5
Introduction to Computer Organization and Architecture

27. Introduction to Computer Organization and Architecture
The processor cache
Main
memory
Processor
Bus
Cache
Introduction to Computer Organization and Architecture

28. Basic Performance Equation
N is the actual number of instruction executions
S is the average number of basic steps needed to
execute one machine instruction
R is the clock rate
T is the processor time required to execute a program
that has been prepared in some high-level language
For N remember that the number of instructions to be executed is different from the number of instruction executions. Example:
A cycle with one instruction to be executed 7 times: instructions to be executed=2 (cycle + regular instruction) , instruction executions =8(cycle +7 times the regular instruction).

29. Instruction Sets: CISC and RISC
RISC – Reduced Instruction Set Computers (smaller S likely leads to larger N)
CISC – Complex Instruction Set Computers (larger S likely leads to smaller N)
The jury is still out.

30. Performance Measurement
System Performance Evaluation Corporation
n is the number of the benchmarks programs in the suite

31. Introduction to Computer Organization and Architecture
Intel Processors: 4004
First microprocessor (1971)
For Busicom calculator
Characteristics
10 mm process
2300 transistors
400 – 800 kHz
4-bit word size
16-pin DIP package
Masks hand cut from Rubylith
Drawn with color pencils
1 metal, 1 poly (jumpers)
Diagonal lines (!)
Introduction to Computer Organization and Architecture

32. Introduction to Computer Organization and Architecture
Intel Processors: 8008
8-bit follow-on (1972)
Dumb terminals
Characteristics
10 mm process
3500 transistors
500 – 800 kHz
8-bit word size
18-pin DIP package
Note 8-bit datapaths
Individual transistors visible
Introduction to Computer Organization and Architecture

33. Introduction to Computer Organization and Architecture
Intel Processors: 8080
16-bit address bus (1974)
Used in Altair computer
(early hobbyist PC)
Characteristics
6 mm process
4500 transistors
2 MHz
8-bit word size
40-pin DIP package
Introduction to Computer Organization and Architecture

34. Introduction to Computer Organization and Architecture
Intel Processors: 8086 / 8088
16-bit processor (1978-9)
IBM PC and PC XT
Revolutionary products
Introduced x86 ISA
Characteristics
3 mm process
29k transistors
5-10 MHz
16-bit word size
40-pin DIP package
Microcode ROM
Introduction to Computer Organization and Architecture

35. Introduction to Computer Organization and Architecture
Intel Processors: 80286
Virtual memory (1982)
IBM PC AT
Characteristics
1.5 mm process
134k transistors
6-12 MHz
16-bit word size
68-pin PGA
Regular datapaths and
ROMs
Bitslices clearly visible
Introduction to Computer Organization and Architecture

36. Introduction to Computer Organization and Architecture
Intel Processors: 80386
32-bit processor (1985)
Modern x86 ISA
Characteristics
1.5-1 mm process
275k transistors
16-33 MHz
32-bit word size
100-pin PGA
32-bit datapath,
microcode ROM,
synthesized control
Introduction to Computer Organization and Architecture

37. Introduction to Computer Organization and Architecture
Intel Processors: 80486
Pipelining (1989)
Floating point unit
8 KB cache
Characteristics
1-0.6 mm process
1.2M transistors
MHz
32-bit word size
168-pin PGA
Cache, Integer datapath,
FPU, microcode,
synthesized control
Introduction to Computer Organization and Architecture

38. Intel Processors: Pentium
Superscalar (1993)
2 instructions per cycle
Separate 8KB I$ & D$
Characteristics
mm process
3.2M transistors
MHz
32-bit word size
296-pin PGA
Caches, datapath,
FPU, control
Introduction to Computer Organization and Architecture

39. Intel Processors: Pentium Pro/II/III
Dynamic execution (1995-9)
3 micro-ops / cycle
Out of order execution
16-32 KB I$ & D$
Multimedia instructions
PIII adds 256+ KB L2$
Characteristics
mm process
5.5M-28M transistors
MHz
32-bit word size
MCM / SECC
Introduction to Computer Organization and Architecture

40. Intel Processors: Pentium 4
Deep pipeline (2001)
Very fast clock
KB L2$
Characteristics
180 – 90 nm process
42-125M transistors
GHz
32-bit word size
478-pin PGA
Units start to become
invisible on this scale
Introduction to Computer Organization and Architecture

41. Intel Processors: Core 2 Duo
2006
Characteristics
65nm and 45nm
291 million transistors
2.5 GHz+ operation
32-bit word size
LGA775
Dual core
14 stage pipeline
Each gets L1 instruction and data caches
Shared L2 cache
Source: Intel
Introduction to Computer Organization and Architecture

42. Transistors in Intel Processors
Introduction to Computer Organization and Architecture

43. Clock Frequencies of Intel uP
Introduction to Computer Organization and Architecture

44. Introduction to Computer Organization and Architecture
Intel Summary
104 increase in transistor count, clock frequency over 30 years!
Introduction to Computer Organization and Architecture

45. Clock Increases Have Slowed
Introduction to Computer Organization and Architecture

46. Introduction to Computer Organization and Architecture
Levels of Abstraction n+ S G D +
PHYSICAL
TRANSISTOR
GATE
RTL
DEVICE
A <= B + C;
Adapted from “Digital Integrated Circuits” copyright 2003 Prentice Hall/Pearson
Introduction to Computer Organization and Architecture

47. Levels of Abstraction (cont’d)
Introduction to Computer Organization and Architecture

48. The End Lecture 1