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SNS Integrated Control System SNS Timing Master LA-UR-03-3377 Eric Bjorklund.

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Presentation on theme: "SNS Integrated Control System SNS Timing Master LA-UR-03-3377 Eric Bjorklund."— Presentation transcript:

1 SNS Integrated Control System SNS Timing Master LA-UR-03-3377 Eric Bjorklund

2 SNS Integrated Control System Basic Characteristics l Event System. –256 events possible. 25 events currently in use. l ~5 millisecond machine cycle. 60 Hz. –Option to go to 120 Hz. when second target added. l 10 second super-cycle. l Clock synchronized with ring RF. –Ring RF is 1.057767 Mz at 1 GeV –Clock is 32 X Ring RF

3 SNS Integrated Control System Timing System Components Ring RF Timing Reference Generator Neutron Choppers AC Line SNS Event Link Master X32 PLL (33 MHz) SNS Real Time Data Link Master 10 MHz Crystal Osc. Timing Slave (V124S) Machine Protection System ICS IOC's SNS Utility Module LEBT Chopper *4 PLL (64 MHz) Experimental Halls Diagnostics RTDL Event Link Master Timing IOC SNS Time Stamps Beam data RF Gates Extraction Kickers TxHV Gates High resolution timestamps Machine Modes SNS Timestamps Remote Reset Synchronous ISR’s Beam Delay Beam Phase Micro pulse width Macro pulse width SNS Time stamps Delays Gates Triggers Timing System Hardware Timing System UsersExperimental Systems Subsystem Hardware

4 SNS Integrated Control System Two Transmission Links l Event Link –Transmits the timing events that define a machine cycle. –Each event is 8 bits plus parity (256 events maximum). –Clock is variable and derived from the ring revolution frequency (32 * F rev ). –Events 0 – 63 are generated by the timing system hardware. –Events 64 – 255 are generated by software (no fixed times). l Real-Time Data Link (RTDL) –Transmits machine parameters and data prior to every new cycle. –128 frames possible (expandable to 255). –Each frame contains an 8-bit frame number, 24-bits of data, and an 8-bit CRC. –Clock is 10 MHz.

5 SNS Integrated Control System Sample RTDL Data Frames Frame NumberData 1 – 3 Time of day 4 Event link period 5 MPS mode 6 60 Hz phase error 7Beam Width 15 IOC Reset Address 17 Pulse Flavor 18-21RF Gate Widths 24 Previous Pulse Status 25 Cycle 255 24-bit CRC (calculated)

6 SNS Integrated Control System Timing Master Crate Layout ProcessorUtility ModuleEvent Link Master (V123S)Event Link Input Module (V101S) Line Synch Module (Reserved)Trigger Module (V124S) Frequency CounterEvent MonitorVME Bridge 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 VME BridgeUtility ModuleRTDL Input Module (V206S) (Reserved)RTDL Input Module (V206S) GPS Interface 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 RTDL Input Module (V206S)RTDL Master (V105S)

7 SNS Integrated Control System Event Link Generator Hardware l Event Link Master Module (V123S) –VME Module. –Generates event link carrier (~17 Mhz). –Accepts, prioritizes, and transmits “hardware” and “software” events. l Event Link Input Module (V101S) –VME Module for generating “hardware” events. –Communicates with the event link master module over the VME P2 backplane. –Hardware events generated from TTL inputs to the V101S –16 events per module.

8 SNS Integrated Control System RTDL Generator Hardware l RTDL Master Module (V105S) –VME Module –Generates the 10 MHz RTDL Carrier Signal and the RTDL frames. l RTDL Input Module (V206S) –VME Module. 8 frames per module. –Stores the data frames to be sent each cycle on the RTDL. –Communicates with the RTDL master module over the VME P2 backplane.

9 SNS Integrated Control System Additional Modules l Timing Reference Generator –Double-Wide VME module. –Provides the 60 Hz “Cycle-Start” signal to the event link master module (V123S). –Uses a PLL to track the AC line zero-crossing and “smooth out” power grid frequency fluctuations. –Resolves the “conflict of interest” between power supplies that need to be “line locked” and the neutron choppers’ need for stable timing. l Frequency Counter –VME Module in the Timing Master crate. –Used to monitor the frequency of the event link clock. –Frequency is broadcast on the RTDL and sent to the timing reference generator to compensate for changes in the ring revolution frequency.

10 SNS Integrated Control System Additional Modules l GPS and GPS Interface Module –GPS provides time source and NTP time service to the site computers. –VME interface card captures the GPS time at each “Cycle Start” time. –Captured time is sent out on the RTDL. l Event Link Monitor –Monitors the event link and records which events occurred and when. –Buffers one full “Super-Cycle” (10 seconds). –Used by the event-link part of the time line monitor to make sure the event link is correct.

11 SNS Integrated Control System Real-Time Data Link (RTDL) Extract MPS FPAR Event Link End Injection Machine Cycle Timeline 02 ms 1 ms 6 ms4 ms 7 ms 5 ms 8 ms3 ms Anytime Informational Events, non critical timingTime Critical Events, (soft events disabled) RTDL Transmit Snapshot, 1Hz, 6Hz, etc… RTDL Valid RTDL parameter transmission (for next cycle) RF & High Voltage Events MPS FPL System xxx Trigger Events (Alternate) Cycle Start Machine +60 Hz Zero Crossing -60 Hz Zero Crossing Line-Synch Reference Clock Beam On Cycle Start Mostly Stable Triggers Beam On Range Allowed Range for Variable Triggers Extraction Kicker Charge beam accumulation

12 SNS Integrated Control System The Product and the Perpetrators


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