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EECE 476: Computer Architecture Slide Set #1: Introduction Instructor: Tor Aamodt.

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Presentation on theme: "EECE 476: Computer Architecture Slide Set #1: Introduction Instructor: Tor Aamodt."— Presentation transcript:

1 EECE 476: Computer Architecture Slide Set #1: Introduction Instructor: Tor Aamodt

2 Algorithm Program ( + OS + Network ) ISA (Instruction Set Arch) Microarchitecture Circuits Problem Electronic Devices Computer Architecture: What?

3 Computer Architecture: Where? 3

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8 Computer Architecture: Why? "What a Computer is to me: is the most remarkable tool that we have ever come up with, and it is like the equivalent of a bicycle to our minds” -- Steve Jobs 8

9 9 Advancing Computer Systems without Technology Progress DARPA/ISAT Workshop, March 26-27, 2012 Mark Hill & Christos Kozyrakis 1971: Intel 4004 2012: Datacenter 1981: IBM 5150 2007: iPhone

10 Computer Architecture: How? Market Opportunities & Requirements 10 hardware design implementation constraints (area, frequency, power) Architecture Design (result ~ block diagram) Achievable Product How to evaluate architecture designs? Cycle-level timing simulator usually developed “in house”. Public (academic research) simulators: SimpleScalar, Marss86, gem5, GPGPU-Sim

11 Image: Justin Rattner Computer Architecture: When? Hardware Design: - VHDL/Verilog - circuit design - layout 11 of 28 Architecture Design: - Cycle level simulator

12 Qualcomm (multi-site team), March 2012 Position: “SoC Architect” Architect market-leading mobile SoC products …. provide quantitative justification for architectural directions; Directly apply computer architecture knowledge of CPUs, GPUs, DSPs, cache coherency, virtual memory, etc.; Skills Hands-on experience in using and modifying simulators and performance/power models… Proficiency in C/C++/SystemC programming. 0-3 years post-educational work experience Education Bachelor’s or Master’s, Computer Science, Electrical, and/or Computer Engineering; Ph.D. is a plus 12

13 EECE 476 Topics Fundamentals of Computer Design Instruction Set Architecture Design Pipelining Out of order execution Branch prediction Superscalar instruction issue Speculative execution Caches Virtual Memory Cache Coherence 13

14 EECE 476 Marks Participation (clickers / flipped classroom quizzes) 5% Assignments (alone or in pairs) 20% Quizzes (best 2 of 3; study group bonus) 10% Midterm: Mon. Oct. 28 in lecture 20% Exam: 45% 14

15 Complexity vs. Ambiguity WARNING: Questions may contain ambiguities Why? –Computers are complex systems –We tend to abstract lower level design details to focus on higher level design On the job you might ask for clarifications. On quiz/midterm/exam: please state your assumptions. 15

16 Textbook? OPTIONAL: Computer Architecture: A Quantitative Approach, John L. Hennessy and David A. Patterson, Morgan Kaufmann, 5th Edition. 16

17 Clickers (Required) 5% of final grade. Count number of questions answered (participation, not correctness). Answer 90% of questions to get full 5%. Start counting next week. Register your clicker online. 17

18 Flipped Class? Zero or more lectures may be delivered by video and we will work through examples in the regular lecture time in a participatory manner. Will give you at least 48 hours notice (probably more). 18

19 Course Website? http://www.ece.ubc.ca/~aamodt/teach/476-2013/ Check here frequently for important news. 19


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